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AD9959BCPZ-REEL7 参数 Datasheet PDF下载

AD9959BCPZ-REEL7图片预览
型号: AD9959BCPZ-REEL7
PDF下载: 下载PDF文件 查看货源
内容描述: [4 Channel 500 MSPS DDS with 10-bit DACs]
分类和应用: 时钟数据分配系统外围集成电路
文件页数/大小: 46 页 / 692 K
品牌: AD [ ANALOG DEVICES ]
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AD9959
TABLE OF CONTENTS
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
REVISION HISTORY
7/08—Rev. A to Rev. B
Added Pin Profile Toggle Rate Parameter in Table 1 ................... 6
Changes to Figure 24 ...................................................................... 14
Changes to Figure 31 ...................................................................... 17
Changes to Reference Clock Input Circuitry Section ................ 20
Changes to Operation Section ...................................................... 29
Changes to Figure 40 ...................................................................... 30
Changes to Serial Data I/O (SDIO_0, SDIO_1, SDIO_3)
Section .............................................................................................. 32
Changes to Table 38 ........................................................................ 43
Added Exposed Pad Notation to Outline Dimensions ............. 44
3/08—Rev. 0 to Rev. A
Changes to Features.......................................................................... 1
Inserted Figure 1 ............................................................................... 1
Changes to Input Level Specification ............................................. 4
Changes to Layout ............................................................................ 8
Changes to Table 3 ............................................................................ 9
Added Equivalent Input and Output Circuits Section .............. 17
Changes to Figure 35...................................................................... 21
Changes to Setting the Slope of the Linear Sweep Section ....... 25
Changes to Frequency Linear Sweep Example: AFP Bits = 10
Section.............................................................................................. 26
Changes to Figure 37...................................................................... 26
Changes to Figure 38 and Figure 39............................................. 27
Added Table 25 ............................................................................... 31
Changes to Figure 41...................................................................... 31
Changes to Figure 42...................................................................... 32
Added Example Instruction Byte Section ................................... 32
Added Table 27 ............................................................................... 33
Changes to Figure 46, Figure 47, Figure 48, and Figure 49....... 35
Changes to Register Maps and Bit Descriptions Section .......... 36
Added Endnote 1 to Table 30 ........................................................ 38
Changes to Ordering Guide .......................................................... 44
7/05—Revision 0: Initial Version
Rev. B | Page 2 of 44