AD9959
DESCRIPTIONS FOR CHANNEL REGISTERS
Channel Function Register (CFR)—Address 0x03
Three bytes are assigned to this register.
Table 34. Bit Descriptions for CFR
Bit
Mnemonic
Description
23:22 Amplitude frequency
phase (AFP) select
Controls what type of modulation is to be performed for that channel. See the Modulation Mode section
for details.
21:16 Open
15
14
13
Linear sweep no-dwell
0 = the linear sweep no-dwell function is inactive (default).
1 = the linear sweep no-dwell function is active. If CFR[15] is active, the linear sweep no-dwell function is
activated. See the Linear Sweep Mode section for details. If CFR[14] is clear, this bit is don’t care.
0 = the linear sweep capability is inactive (default).
1 = the linear sweep capability is enabled. When enabled, the delta frequency tuning word is applied to
the frequency accumulator at the programmed ramp rate.
Linear sweep enable
Load SRR at
I/O_UPDATE
0 = the linear sweep ramp rate timer is loaded only upon timeout (timer = 1) and is not loaded because
of an I/O_UPDATE input signal (default).
1 = the linear sweep ramp rate timer is loaded upon timeout (timer = 1) or at the time of an I/O_UPDATE
input signal.
12:11 Open
10
Must be 0
Must be set to 0.
9:8
DAC full-scale current
control
11 = the DAC is at the largest LSB value (default).
See Table 5 for other settings.
7
6
5
Digital power-down
0 = the digital core is enabled for operation (default).
1 = the digital core is disabled and is in its lowest power dissipation state.
0 = the DAC is enabled for operation (default).
1 = the DAC is disabled and is in its lowest power dissipation state.
0 = matched pipe delay mode is inactive (default).
DAC power-down
Matched pipe delays
active
1 = matched pipe delay mode is active. See the Single-Tone Mode—Matched Pipeline Delay section for
details.
4
Autoclear sweep
accumulator
0 = the current state of the sweep accumulator is not impacted by receipt of an I/O_UPDATE signal
(default).
1 = the sweep accumulator is automatically and synchronously cleared for one cycle upon receipt
of an I/O_UPDATE signal.
3
2
Clear sweep
accumulator
Autoclear phase
accumulator
0 = the sweep accumulator functions as normal (default).
1 = the sweep accumulator memory elements are asynchronously cleared.
0 = the current state of the phase accumulator is not impacted by receipt of an I/O_UPDATE signal
(default).
1 = the phase accumulator is automatically and synchronously cleared for one cycle upon receipt
of an I/O_UPDATE signal.
1
0
Clear phase
accumulator
Sine wave output
enable
0 = the phase accumulator functions as normal (default).
1 = the phase accumulator memory elements are asynchronously cleared.
0 = the angle-to-amplitude conversion logic employs a cosine function (default).
1 = the angle-to-amplitude conversion logic employs a sine function.
Rev. B | Page 41 of 44
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