AD9807/AD9805
ANALOG
INPUTS
PIXEL 0
PIXEL 1
PIXEL n
tAD
tAD
STRTLN
tC1B
tCRB
tC1C2B
tS
tH
tC2C1B
CDSCLK1
tC2B
tC1AD
CDSCLK2
ADCCLK
tACLK
tACLK
tSTL1
tCP2
tGOS
tGOH
GAIN<n:0>
OFFSET<m:0>
G0
G1
G2
Figure 1d. 1-Channel CDS-Mode Clock Tim ing (Red Channel)
ANALOG
INPUTS
R0, G0, B0
R1, G1, B1
Rn, Gn, Bn
(0V)
tAD
STRTLN
CDSCLK1
ADCCLK
tC2B
tCRB
tS
tH
tSTL2
tACLK
tACLK
tGOH
tCP
tGOS
GAIN<n:0>
OFFSET<m:0>
G2
G0
G1
Figure 1e. 1-Channel SHA-Mode Clock Tim ing (for Blue and Green Channels)
ANALOG
INPUTS
R0, G0, B0
R1, G1, B1
Rn, Gn, Bn
(0V)
tAD
STRTLN
CDSCLK1
ADCCLK
tC2B
tCRB
tS
tH
tSTL1
tACLK
tACLK
tGOH
tCP2
tGOS
GAIN<n:0>
OFFSET<m:0>
G0
G1
Figure 1f. 1-Channel SHA-Mode Clock Tim ing (Red Channel)
REV. 0
–9–