AD9807/AD9805
VREF
RED
CDS
PGA
OFFSET<M:0>
GAIN<N:0>
AD9807/AD9805
BANDGAP
REFERENCE
8-10
12-10/10-8
I/O
OEB
12
DOUT<11:0>/MPU<7:0>
VINR
GREEN
VING
CDS
PGA
MUX
3
INPUT OFFSET
REGISTER
VINB
BLUE
CDS
PGA
R
G
B
CONFIGURATION
REGISTER
2
CONFIGURATION
REGISTER
R
G
B
12-BIT/10-BIT
A/D
12
DIGITAL
12
DIGITAL
X
MULTIPLIER
12
–
SUBTRACTOR
8
CSB
R
ODD
G
ODD
B
ODD
R
EVEN
G
EVEN
B
EVEN
MPU
PORT
RDB
WRB
A2
A1
A0
CDSCLK1
CDSCLK2 STRTLN ADCCLK
Figure 4. Block Diagram
7
6
5
4
3
2
1
0
REGISTER OVERVIEW
MPU Port Map
Table II shows the MPU Port Map. The MPU Port Map is
accessed through pins A0, A1 and A2 of the AD9807/AD9805,
and provides the decoding scheme for the various registers of
the AD9807/AD9805. When writing or reading from any of the
registers, the appropriate bits must be applied to A0–A2.
Table II. MPU Port Map Format
8X FULL SCALE
4X FULL SCALE
2X FULL SCALE
10-BIT GAIN, 10-BIT OFFSET
11-BIT GAIN, 9-BIT OFFSET
12-BIT GAIN, 8-BIT OFFSET
COLOR0
COLOR1
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
Register
Configuration Register
Configuration Register 2
PGA Gain Register
Odd Offset Register
Even Offset Register
Input Offset Register
RESERVED
Bayer Mode
Figure 5. AD9807 Configuration Register Format
Configuration Register/AD9807
The Configuration Register controls three functions: a color
pointer, gain and offset pin configurations, and digital gain
scaling. Figure 5 shows the AD9807 Configuration Register.
Bits 0–2 control the digital scaling function. Setting a bit makes
the corresponding condition true. Resetting Bits 0–2 disables
and bypasses the digital multiplier. Bits 3–5 control the gain
and offset pin distribution. Resetting Bits 3–5 disables and
bypasses the digital subtracter and sets the gain word width to
12. Setting any bit makes the corresponding condition true. For
example, if Bit 3 is set, the 2 LSBs of the gain word become the
2 MSBs of the offset word. If Bit 4 is set, the LSB of the gain
word becomes MSB of the offset word. Bits 6 and 7 direct
register data written to the MPU<7:0> bus to the appropriate
red, green or blue register.
Configuration Register/AD9805
The Configuration Register controls three functions: a color
pointer, gain and offset pin configurations, and digital gain
scaling. Figure 6 shows the AD9805 Configuration Register.
Bits 0–2 control the digital scaling function. Setting a Bit
makes the corresponding condition true. Resetting Bits 0–2
disables and bypasses the digital multiplier. Bits 3–5 control
the gain and offset pin distribution. Resetting Bits 3–5 disables
and bypasses the digital subtracter and sets the gain word width
to 10. Setting any bit makes the corresponding condition true.
If Bit 3 is set, the 2 LSBs of the gain word become the 2 MSBs
of the offset word. If Bit 4 is set, the LSB of the gain word
becomes MSB of the offset word. Bits 6 and 7 direct register
data written to the MPU<7:0> bus to the appropriate red,
green or blue register.
7
6
5
4
3
2
1
0
8X FULL SCALE
4X FULL SCALE
2X FULL SCALE
8-BIT GAIN, 10-BIT OFFSET
9-BIT GAIN, 9-BIT OFFSET
10-BIT GAIN, 8-BIT OFFSET
COLOR0
COLOR1
Figure 6. AD9805 Configuration Register Format
REV. 0
–11–
AD [ ANALOG DEVICES ]
