AD9228
TIMING DIAGRAMS
N-1
AIN
tA
N
tEH
tEL
CLK–
CLK+
tCPD
DCO–
DCO+
tFRAME
tFCO
FCO–
FCO+
tPD
tDATA
D6
D–
D+
MSB
D10
D9
D8
D7
D5
D4
D3
D2
D1
D0
MSB
N – 9
D10
N – 9
N – 10 N – 10 N – 10 N – 10 N – 10 N – 10 N – 10 N – 10 N – 10 N – 10 N – 10 N – 10
Figure 2. 12-Bit Data Serial Stream (Default)
N-1
AIN
tA
N
tEH
tEL
CLK–
CLK+
tCPD
DCO–
DCO+
tFRAME
tFCO
FCO–
FCO+
D–
tPD
tDATA
MSB
N–10
D8
N–10
D7
D6
D5
N–10
D4
D3
D2
D1
D0
MSB
N–9
D8
N–9
D7
N–9
D6
N–9
D5
N–9
N–10 N–10
N–10 N–10 N–10
N–10 N–10
D+
Figure 3. 10-Bit Data Serial Stream
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