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AD7715AN-5 参数 Datasheet PDF下载

AD7715AN-5图片预览
型号: AD7715AN-5
PDF下载: 下载PDF文件 查看货源
内容描述: 3 V / 5 V , 450 uA的16位, Σ-Δ ADC [3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC]
分类和应用: 转换器模数转换器光电二极管
文件页数/大小: 31 页 / 476 K
品牌: ADI [ ADI ]
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(AVDD = +5 V, DVDD = +3 V or +5 V, REF IN(+) = +2.5 V; REF IN(–) = AGND;  
fCLK IN = 2.4576 MHz unless otherwise noted. All specifications TMIN to TMAX unless otherwise noted.)  
AD7715-5–SPECIFICATIONS  
Parameter  
A Version1  
Unit  
Conditions/Comments  
STATIC PERFORMANCE  
No Missing Codes  
16  
Bits min  
Guaranteed by Design. Filter Notch 60 Hz  
Depends on Filter Cutoffs and Selected Gain  
Filter Notch 60 Hz  
Output Noise  
See Tables V to VIII  
Integral Nonlinearity  
Unipolar Offset Error  
Unipolar Offset Drift3  
Bipolar Zero Error  
±0.0015  
See Note 2  
0.5  
See Note 2  
0.5  
See Note 2  
0.5  
See Note 2  
0.5  
% of FSR max  
µV/°C typ  
µV/°C typ  
µV/°C typ  
Bipolar Zero Drift3  
Positive Full-Scale Error4  
Full-Scale Drift3, 5  
Gain Error6  
Gain Drift3, 7  
ppm of FSR/°C typ  
% of FSR max  
µV/°C typ  
Bipolar Negative Full-Scale Error2  
Bipolar Negative Full-Scale Drift3  
±0.0015  
1
0.6  
Typically ±0.0004%  
For Gains of 1 and 2  
For Gains of 32 and 128  
µV/°C typ  
ANALOG INPUTS/REFERENCE INPUTS  
Input Common-Mode Rejection (CMR)  
Normal-Mode 50 Hz Rejection8  
Normal-Mode 60 Hz Rejection8  
Common-Mode 50 Hz Rejection8  
Common-Mode 60 Hz Rejection8  
Common-Mode Voltage Range9  
Absolute AIN/REF IN Voltage8  
Specifications for AIN and REF IN Unless Noted  
at DC. Typically 102 dB  
90  
98  
98  
150  
dB min  
dB min  
dB min  
dB min  
dB min  
V min to V max  
V min  
V max  
V min  
V max  
nA max  
pF max  
For Filter Notches of 25 Hz, 50 Hz, ± 0.02 × fNOTCH  
For Filter Notches of 20 Hz, 60 Hz, ± 0.02 × fNOTCH  
For Filter Notches of 25 Hz, 50 Hz, ± 0.02 × fNOTCH  
For Filter Notches of 20 Hz, 60 Hz, ± 0.02 × fNOTCH  
AIN for BUF Bit of Setup Register = 0 and REF IN  
AIN for BUF Bit of Setup Register = 0 and REF IN  
150  
AGND to AVDD  
AGND – 30 mV  
AVDD + 30 mV  
AGND + 50 mV  
AVDD – 1.5 V  
1
Absolute/Common-Mode AIN Voltage9  
BUF Bit of Setup Register = 1  
AIN DC Input Current8  
AIN Sampling Capacitance8  
AIN Differential Voltage Range10  
10  
0 to +VREF/GAIN11 nom  
Unipolar Input Range (B/U Bit of Setup Register = 1)  
Bipolar Input Range (B/U Bit of Setup Register = 0)  
For Gains of 1 and 2  
For Gains of 32 and 128  
±1% for Specified Performance. Functional with  
Lower VREF  
±VREF/GAIN  
GAIN × fCLK IN/64  
nom  
AIN Input Sampling Rate, fS  
REF IN(+) – REF IN(–) Voltage  
REF IN Input Sampling Rate, fS  
f
CLK IN/8  
+2.5  
V nom  
fCLK IN/64  
LOGIC INPUTS  
Input Current  
±10  
µA max  
All Inputs Except MCLK IN  
V
V
V
V
INL, Input Low Voltage  
INL, Input Low Voltage  
INH, Input High Voltage  
INH, Input High Voltage  
0.8  
0.4  
2.4  
2.0  
V max  
V max  
V min  
V min  
DVDD = +5 V  
DVDD = +3.3 V  
DVDD = +5 V  
MCLK IN Only  
V
V
V
INL, Input Low Voltage  
INL, Input Low Voltage  
INH, Input High Voltage  
0.8  
0.4  
3.5  
2.5  
V max  
V max  
V min  
V min  
DVDD = +5 V  
DVDD = +3.3 V  
DVDD = +5 V  
DVDD = +3.3 V  
VINH, Input High Voltage  
LOGIC OUTPUTS (Including MCLK OUT)  
VOL, Output Low Voltage  
0.4  
0.4  
4.0  
V max  
V max  
V min  
V min  
µA max  
pF typ  
ISINK = 800 µA Except for MCLK OUT12. DVDD = +5 V  
ISINK = 100 µA Except for MCLK OUT12. DVDD = +3.3 V  
ISOURCE = 200 µA Except for MCLK OUT12. DVDD = +5 V  
ISOURCE = 100 µA Except for MCLK OUT12. DVDD = +3.3 V  
V
V
V
OL, Output Low Voltage  
OH, Output High Voltage  
OH, Output High Voltage  
DVDD – 0.6 V  
±10  
9
Binary  
Offset Binary  
Floating State Leakage Current  
Floating State Output Capacitance13  
Data Output Coding  
Unipolar Mode  
Bipolar Mode  
–2–  
REV. C  
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