AD73360
Table X. Control Register D Description
7
6
5
4
3
2
1
0
CONTROL REGISTER D
PUI2
I2GS2
I2GS1
I2GS0
PUI1
I1GS2
I1GS1
I1GS0
Bit Name
Description
0
1
2
3
4
5
6
7
I1GS0
I1GS1
I1GS2
PUI1
I2GS0
I2GS1
I2GS2
PUI2
ADC1:Input Gain Select (Bit 0)
ADC1:Input Gain Select (Bit 1)
ADC1:Input Gain Select (Bit 2)
Power Control (ADC1); 1 = ON, 0 = OFF
ADC2:Input Gain Select (Bit 0)
ADC2:Input Gain Select (Bit 1)
ADC2:Input Gain Select (Bit 2)
Power Control (ADC2); 1 = ON, 0 = OFF
Table XI. Control Register E Description
7
6
5
4
3
2
1
0
CONTROL REGISTER E
PUI4
I4GS2
I4GS1
I4GS0
PUI3
I3GS2
I3GS1
I3GS0
Bit Name
Description
0
1
2
3
4
5
6
7
I3GS0
I3GS1
I3GS2
PUI3
I4GS0
I4GS1
I4GS2
PUI4
ADC3:Input Gain Select (Bit 0)
ADC3:Input Gain Select (Bit 1)
ADC3:Input Gain Select (Bit 2)
Power Control (ADC3); 1 = ON, 0 = OFF
ADC4:Input Gain Select (Bit 0)
ADC4:Input Gain Select (Bit 1)
ADC4:Input Gain Select (Bit 2)
Power Control (ADC4); 1 = ON, 0 = OFF
Table XII. Control Register F Description
7
6
5
4
3
2
1
0
CONTROL REGISTER F
PUI6
I6GS2
I6GS1
I6GS0
PUI5
I5GS2
I5GS1
I5GS0
Bit Name
Description
0
1
2
3
4
5
6
7
I5GS0
I5GS1
I5GS2
PUI5
I6GS0
I6GS1
I6GS2
PUI6
ADC5:Input Gain Select (Bit 0)
ADC5:Input Gain Select (Bit 1)
ADC5:Input Gain Select (Bit 2)
Power Control (ADC5); 1 = ON, 0 = OFF
ADC6:Input Gain Select (Bit 0)
ADC6:Input Gain Select (Bit 1)
ADC6:Input Gain Select (Bit 2)
Power Control (ADC6); 1 = ON, 0 = OFF
–16–
REV. B