AD1847
Left Input Contr ol Register (Index Addr ess 0)
IA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
LIG 0
0000
LSS1
LSS0
res
res
LIG 3
LIG 2
LIG 1
LIG3:0 Left Input Gain Select. T he least significant bit of this 16-level gain select represents +1.5 dB. Maximum gain is
+22.5 dB.
res
Reserved for future expansion. Write zeros (LO) to all reserved bits.
LSS1:0 Left Input Source Select. T hese bits select the input source for the left gain stage preceding the left ADC.
0
1
2
3
Left Line 1 Source Selected
Left Auxiliary 1 Source Selected
Left Line 2 Source Selected
Left Line 1 Post-Mixed Output Loopback Source Selected
T his register’s initial state after reset is: 0000 0000 (00h).
Right Input Contr ol Register (Index Addr ess 1)
IA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
0001
RSS1
RSS0
res
res
RIG 3
RIG 2
RIG 1
RIG 0
RIG3:0 Right Input Gain Select. T he least significant bit of this 16-level gain select represents +1.5 dB. Maximum gain is
+22.5 dB.
res
Reserved for future expansion. Write zeros (LO) to all reserved bits.
RSS1:0 Right Input Source Select. T hese bits select the input source for the right gain stage preceding the right ADC.
0
1
2
3
Right Line 1 Source Selected
Right Auxiliary 1 Source Selected
Right Line 2 Source Selected
Right Line 1 Post-Mixed Output Loopback Source Selected
T his register’s initial state after reset is: 0000 0000 (00h).
Left Auxiliar y # 1 Input Contr ol Register (Index Addr ess 2)
IA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
0010
LMX1
res
res
LX1G 4
LX1G 3
LX1G 2
LX1G 1
LX1G 0
LX1G4:0 Left Auxiliary Input # 1 Gain Select. T he least significant bit of this 32-level gain/attenuate select represents –1.5 dB.
LX1G4:0 = 0 produces a +12 dB gain. LX1G4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is
–34.5 dB. Gains referred to 2.0 V p-p full-scale output level.
res
Reserved for future expansion. Write zeros (LO) to all reserved bits.
LMX1
Left Auxiliary # 1 Mute. T his bit, when set HI, will mute the left channel of the Auxiliary # 1 input source. T his bit is set
HI after reset.
T his register’s initial state after reset is: 1000 0000 (80h).
Right Auxiliar y # 1 Input Contr ol Register (Index Addr ess 3)
IA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
0011
RMX1
res
res
RX1G 4
RX1G 3
RX1G 2
RX1G 1
RX1G 0
RX1G4:0 Right Auxiliary Input # 1 Gain Select. T he least significant bit of this 32-level gain/attenuate select represents –1.5 dB.
RX1G4:0 = 0 produces a +12 dB gain. RX1G4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is
–34.5 dB. Gains referred to 2.0 V p-p full-scale output level.
res
Reserved for future expansion. Write zeros (LO) to all reserved bits.
RMX1
Right Auxiliary # 1 Mute. T his bit, when set to HI, will mute the right channel of the Auxiliary # 1 input source. T his bit is
set to HI after reset.
T his register’s initial state after reset is: 1000 0000 (80h).
REV. B
–13–
ADI [ ADI ]
