AD1847
D ata For m at Register (Index Addr ess 8)
IA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
1000
res
FM T
C/L
S/M
C FS2
C FS1
C FS0
CSL
The contents of this register can NOT be changed except when the AD1847 is in the Mode Change Enable (MCE) state (i.e., the MCE bit in
the Control Word is HI). Write attempts to this register when the AD1847 is not in the MCE state will not be successful.
CSL
Clock Source Select. T his bit selects the clock source to be used for the audio sample rate.
0
1
XT AL1 (24.576 MHz)
XT AL2 (16.9344 MHz)
CFS2:0 Clock Frequency Divide Select. T hese bits select the audio sample rate frequency. T he audio sample rate depends on
which clock source is selected and the frequency of the clock source.
D ivide
Factor
XTAL1
24.576 MH z
XTAL2
16.9344 MH z
CFS2:0
0
1
2
3
4
5
6
7
3072
1536
896
768
448
384
512
2560
8.0 kHz
16.0 kHz
5.5125 kHz
11.025 kHz
18.9 kHz
22.05 kHz
37.8 kHz
44.1 kHz
33.075 kHz
6.615 kHz
27.42857 kHz
32.0 kHz
Not Supported
Not Supported
48.0 kHz
9.6 kHz
Note that the AD1847’s internal oscillators can be overdriven by external clock sources at the crystal inputs. T his is the
configuration used by serial bus slave codecs in daisy-chained multiple codec systems. If an external clock source is ap-
plied, it will be divided down by the selected Divide Factor. T he external clock need not be at the recommended crystal
frequencies.
S/M
C/L
Stereo/Mono Select. T his bit determines how the audio data streams are formatted. Selecting stereo will result with alter-
nating samples representing left and right audio channels. Mono playback plays the same audio sample on both channels.
Mono capture only captures data from the left audio channel.
0
1
Mono
Stereo
Companded/Linear Select. T his bit selects between a linear digital representation of the audio signal or a nonlinear, com-
panded format for all input and output data. T he type of linear PCM or the type of companded format is defined by the
FMT bits.
0
1
Linear PCM
Companded
FMT
Format Select. T his bit defines the format for all digital audio input and output based on the state of the C/L bit.
Linear P CM (C/L = 0)
Com panded (C/L = 1)
0
1
8-bit unsigned linear PCM
16-bit signed linear PCM
8-bit µ-law companded
8-bit A-law companded
res
Reserved for future expansion. Write zeros (LO) to all reserved bits.
T his register’s initial state after reset is: 0000 0000 (00h).
REV. B
–15–
ADI [ ADI ]
