AD14060/AD14060L
operations such as starting, stopping and single-stepping mul-
tiple ADSP-2106xs in a synchronous manner. If you do not
need these operations to occur synchronously on the multiple
processors, simply tie Pin 4 of the EZ-ICE header to ground.
as possible on your board. If T CK, T MS and CLKIN are driv-
ing a large number of ADSP-2106xs (more than eight) in your
system, then treat them as a “clock tree” using multiple drivers
to minimize skew. (See Figure 8 JT AG Clock T ree and Clock
Distribution in the “High Frequency Design Considerations”
section of the ADSP-2106x User’s Manual).
If synchronous multiprocessor operations are needed and CLKIN
is connected, clock skew between the AD14060/AD14060L and
the CLKIN pin on the EZ-ICE header must be minimal. If the
skew is too large, synchronous operations may be off by one
cycle between processors. For synchronous multiprocessor
operation T CK, T MS, CLKIN and EMU should be treated as
critical signals in terms of skew, and should be laid out as short
If synchronous multiprocessor operations are not needed (i.e.,
CLKIN is not connected), just use appropriate parallel termina-
tion on T CK and T MS. T DI, T DO, EMU and TRST are not
critical signals in terms of skew.
TDI
TDO
TDI
TDO
TDI
TDO
5k⍀
*
TDI
TDO
TDI
TDO
TDI
TDO
TDI
5k⍀
*
EMU
TCK
TMS
TRST
TDO
SYSTEM
CLKIN
CLKIN
EMU
*
OPEN DRAIN DRIVER OR EQUIVALENT, i.e.,
Figure 8. J TAG Clocktree for Multiple ADSP-2106x System s
REV. A
–13–
ADI [ ADI ]
