ACT5880
Rev 2, 03-Sep-13
REGISTER AND BIT DESCRIPTIONS CONT’D
DEFAULT
and
ACCESS
ADDRESS
and BIT
BLOCK
NAME
DESCRIPTION
Pre-charge Time-out Interrupt Mask. Set both this bit and
TIMR_STAT[ ] to 1 to allow interrupt when a Pre-charge time-out
event occurs.
7
6
TIMR_PRE
0
0
W/R
W/R
Battery Temperature or Battery Installation Detection Interrupt
Mask. Write this bit with TEMP_STAT[ ] (BATT_STAT[ ]) to 1 to
allow interrupt when the main battery temperature goes into the
valid range or when the main battery is being installed.
TEMP_POS
or
BATT_POS
Input Voltage Interrupt Mask. Write this bit with INPUT_STAT[ ] to
1 to allow interrupt when CHGIN input voltage goes into the valid
5
4
3
INPUT_POS
CHG_POS
TIMR_TOT
0
0
0
W/R
W/R
W/R
range. The valid range is VUVLO<VCHGIN<VOVP
.
Charge State Interrupt Mask. Write this bit with CHG_STAT[ ] to
1 to allow interrupt when the state machine gets in the EOC state.
0xD9
Total Charge Time-out Interrupt Mask. Set both this bit and
TIMR_STAT[ ] to 1 to allow interrupt when a total charge time-out
event occurs.
Battery Temperature or Battery Installation Detection Interrupt
Mask. Write this bit with TEMP_STAT[ ] (BATT_STAT[ ]) to 1 to
allow interrupt when the main battery temperature goes out of the
valid range or when the main battery is being removed.
TEMP_NEG
or
BATT_NEG
2
0
W/R
CHG
Input Voltage Interrupt Mask. Write this bit with INPUT_STAT[ ] to
1 to allow interrupt when CHGIN input voltage goes out of the
1
0
INPUT_NEG
CHG_NEG
0
0
W/R
W/R
valid range. The valid range is VUVLO<VCHGIN<VOVP
.
Charge State Interrupt Mask. Write this bit with CHG_STAT[ ] to
1 to allow interrupt when the state machine gets out of the EOC
state.
Reserved for future use.
Reserved for future use.
7
6
RFU
RFU
x
x
WE/R
WE/R
Charger Status. [1:0]=00, charger is off for forced suspend, time-
out fault, battery temperature invalid, and operation in LDO
mode; 01 is for in Sleep state; 10 is for in the Fast-Charge state,
the Top-off state; 11 is for in the Pre-condition state.
5
4
CHGSTAT0
CHGSTAT1
0
0
R
R
0xDA
Reserved for future use.
Not used.
3
2
1
0
RFU
x
x
x
x
R
x
x
x
x
x
Not used.
Not used.
x
Note:
W/R: Write and read accessible. R: Read accessible, writing to the bit does not make change to the volume. WE/R: Write
and read accessible, write exact what it is before to avoid unexpected behavior. X is uncertain volume.
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