ACT5880
Rev 2, 03-Sep-13
REGISTER AND BIT DESCRIPTIONS CONT’D
DEFAULT
and
ACCESS
ADDRESS
and BIT
BLOCK
NAME
DESCRIPTION
Not used.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
x
x
x
x
x
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
x
x
0
0
0
0
x
x
SETHR[4]
SETHR[3]
SETHR[2]
SETHR[1]
SETHR[0]
SETDAY[7]
SETDAY[6]
SETDAY[5]
SETDAY[4]
SETDAY[3]
SETDAY[2]
SETDAY[1]
SETDAY[0]
SETDAY[15]
SETDAY[14]
SETDAY[13]
SETDAY[12]
SETDAY[11]
SETDAY[10]
SETDAY[9]
SETDAY[8]
x
Setting register for hours. Store the hours into this register firstly,
then set the RCL[ ] to 1 to load the RTC.
0xAC
W/R
Setting register for the elapsed days. Store the lower byte of days
into this register firstly, then set the RCL[ ] to 1 to load the RTC.
The SETDAY[0] is the LSB of the days word.
0xB0
W/R
RTC
Setting register for the elapsed days. Store the upper byte of
days into this register firstly, then set the RCL[ ] to 1 to load the
RTC.
The SETDAY[15] is the MSB of the days word.
0xB1
W/R
Not used.
x
Not used.
x
x
Not used.
x
x
Interrupt flag. Read 1 if timing alarm asserted. Write 0 to clear.
Interrupt flag. Read 1 if timing alarm asserted. Write 0 to clear.
Interrupt flag. Read 1 if timing alarm asserted. Write 0 to clear.
Interrupt flag. Read 1 if timing alarm asserted. Write 0 to clear.
ALMINT
W/R
W/R
W/R
W/R
0xB4
DAYINT
HRINT
MININT
Interrupt flag. Read 1 if every second alarm asserted, Write 0 to
clear.
0
SECINT
0
W/R
Note:
W/R: Write and read accessible. X is uncertain volume.
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