FEDL87V2107-01
OKI Semiconductor
ML87V2107
1.3 Input/Output Format
1.3.1 Input Data Format
The input of this IC complies with 16-bit 4:2:2 (YI[7:0] = Y-8bit, CI[7:0] = CbCr-8bit 4:2:2) format (16-bit input
mode), 8-bit 4:2:2 (YI[7:0] = YCbCr-8bit 4:2:2, without SAV, EVA) format (8-bit input mode) and ITU-R
BT.656 conforming (YI[7:0] = YCbCr-8bit 4:2:2, with SAV, EAV) format (ITU-R BT.656 input mode).
The input format mode is set by an external pin MODE 2, MODE 3, or I2C-bus setting register DISEL
(SUB:41h-bit[0]), or R656 (SUB:41h-bit[1]).
Switching of an external pin and a register is accomplished by setting the I2C-bus setting register IRMON
(SUB:40h-bit[7]).
Table F1-3-1 (1) Input Data Format Mode
IRMON
MODE2 MODE3
DISEL
R656I
Mode
0
1
0
1
0
1
0
X
1
0
X
0
X
0
X
0
X
0
X
1
16-bit input mode (IVS and IHS inputs required)
X
1
8-bit input mode (IVS and IHS inputs required)
X
X
X
X
1
X
X
ITU-R BT.656 input mode
(IVS and IHS inputs not required. SAV and EAV Sync.)
X
Table F1-3-1(2) Input Data Format
8-bit input mode
ITU-R BT.656 input mode
Input pin
16-bit input mode
YI7
YI6
Y07
Y06
Y17
Y16
Y15
Y14
Y13
Y12
Y11
Y10
Cr07
Cr06
Cr05
Cr04
Cr03
Cr02
Cr01
Cr00
1
Cb07
Cb06
Cb05
Cb04
Cb03
Cb02
Cb01
Cb00
—
Y07
Y06
Y05
Y04
Y03
Y02
Y01
Y00
—
Cr07
Cr06
Cr05
Cr04
Cr03
Cr02
Cr01
Cr00
—
Y17
Y16
Y15
Y14
Y13
Y12
Y11
Y10
—
YI5
Y05
YI4
Y04
YI3
Y03
YI2
Y02
YI1
Y01
YI0
Y00
CI7
Cb07
Cb06
Cb05
Cb04
Cb03
Cb02
Cb01
Cb00
0
CI6
—
—
—
—
CI5
—
—
—
—
CI4
—
—
—
—
CI3
—
—
—
—
CI2
—
—
—
—
CI1
—
—
—
—
CI0
—
—
—
—
Y point
C point
0
1
0
0
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