VT82C686B
Offset 42 - ACPI Interrupt Select ....................................RW
Offset 45-44 - Primary Interrupt Channel (0000h) ....... RW
..................................RO
7
ATX / AT Power Indicator
15 1/0 = Ena/Disa IRQ15 as Primary Intrpt Channel
14 1/0 = Ena/Disa IRQ14 as Primary Intrpt Channel
13 1/0 = Ena/Disa IRQ13 as Primary Intrpt Channel
12 1/0 = Ena/Disa IRQ12 as Primary Intrpt Channel
11 1/0 = Ena/Disa IRQ11 as Primary Intrpt Channel
10 1/0 = Ena/Disa IRQ10 as Primary Intrpt Channel
0
1
ATX
AT
..........................................................RO
........................................ always reads 0
6
5
4
SUSC# State
Reserved
.................RO
SUSC# AC-Power-On Default Value
9
8
7
6
5
4
3
2
1
0
1/0 = Ena/Disa IRQ9 as Primary Intrpt Channel
1/0 = Ena/Disa IRQ8 as Primary Intrpt Channel
1/0 = Ena/Disa IRQ7 as Primary Intrpt Channel
1/0 = Ena/Disa IRQ6 as Primary Intrpt Channel
1/0 = Ena/Disa IRQ5 as Primary Intrpt Channel
1/0 = Ena/Disa IRQ4 as Primary Intrpt Channel
1/0 = Ena/Disa IRQ3 as Primary Intrpt Channel
This bit is written at RTC Index 0D bit-7.
3-0 SCI Interrupt Assignment
0000 Disable ...................................................default
0001 IRQ1
0010 Reserved
0011 IRQ3
0100 IRQ4
0101 IRQ5
0110 IRQ6
0111 IRQ7
1000 IRQ8
1001 IRQ9
1010 IRQ10
1011 IRQ11
1100 IRQ12
1101 IRQ13
1110 IRQ14
1111 IRQ15
........................................always reads 0
Reserved
1/0 = Ena/Disa IRQ1 as Primary Intrpt Channel
1/0 = Ena/Disa IRQ0 as Primary Intrpt Channel
Offset 47-46 - Secondary Interrupt Channel (0000h).... RW
15 1/0 = Ena/Disa IRQ15 as Secondary Intr Channel
14 1/0 = Ena/Disa IRQ14 as Secondary Intr Channel
13 1/0 = Ena/Disa IRQ13 as Secondary Intr Channel
12 1/0 = Ena/Disa IRQ12 as Secondary Intr Channel
11 1/0 = Ena/Disa IRQ11 as Secondary Intr Channel
10 1/0 = Ena/Disa IRQ10 as Secondary Intr Channel
9
8
7
6
5
4
3
2
1
0
1/0 = Ena/Disa IRQ9 as Secondary Intr Channel
1/0 = Ena/Disa IRQ8 as Secondary Intr Channel
1/0 = Ena/Disa IRQ7 as Secondary Intr Channel
1/0 = Ena/Disa IRQ6 as Secondary Intr Channel
1/0 = Ena/Disa IRQ5 as Secondary Intr Channel
1/0 = Ena/Disa IRQ4 as Secondary Intr Channel
1/0 = Ena/Disa IRQ3 as Secondary Intr Channel
Offset 43 – Internal Timer Read Test...............................RO
7-0 Internal Timer Read Test
........................................always reads 0
Reserved
1/0 = Ena/Disa IRQ1 as Secondary Intr Channel
1/0 = Ena/Disa IRQ0 as Secondary Intr Channel
Revision 1.71 June 9, 2000
-83-
Function 4 Regs - Power Management, SMBus and HWM
ETC [ ETC ]
