VT82C686B
Function 4 Regs - Power Management, SMBus and HWM
This section describes the ACPI (Advanced Configuration and
Power Interface) Power Management system of the
VT82C686B which includes a System Management Bus
(SMBus) interface controller and Hardware Monitoring
(HWM) subsystem. The power management system of the
VT82C686B supports both ACPI and legacy power
management functions and is compatible with the APM v1.2
and ACPI v1.0 specifications.
PCI Configuration Space Header
Offset 1-0 - Vendor ID .......................................................RO
Offset 8 - Revision ID (nnh).............................................. RO
7-0 Silicon Revision Code
................. (1106h = VIA Technologies)
0-7 Vendor ID
Offset 3-2 - Device ID.........................................................RO
................(3057h = ACPI Power Mgmt)
Offset 5-4 - Command.......................................................RW
........................................ always reads 0
Offset 9 - Programming Interface (00h) .......................... RO
The value returned by this register may be changed by writing
the desired value to PCI Configuration Function 4 offset 61h.
0-7 Device ID
15-8 Reserved
Offset A - Sub Class Code (00h) ....................................... RO
The value returned by this register may be changed by writing
the desired value to PCI Configuration Function 4 offset 62h.
........................................fixed at 0
(parity error response) ..................fixed at 0
(VGA palette snoop) ....................fixed at 0
7
6
5
4
3
2
1
0
Address Stepping
Reserved
Reserved
...................fixed at 0
Memory Write and Invalidate
Offset B - Base Class Code (00h)...................................... RO
The value returned by this register may be changed by writing
the desired value to PCI Configuration Function 4 offset 63h.
(special cycle monitoring) ............fixed at 0
Reserved
.................................................fixed at 0
Bus Master
Memory Space
.............................................fixed at 0
.................................................fixed at 0
I/O Space
Offset 0D - Latency Timer ............................................... RW
..............................................default = 0
7-0 Timer Value
Offset 7-6 - Status...........................................................RWC
........................ always reads 0
...................... always reads 0
...................... always reads 0
...................... always reads 0
...................... always reads 0
15 Detected Parity Error
14 Signalled System Error
13 Received Master Abort
12 Received Target Abort
11 Signalled Target Abort
10-9 DEVSEL# Timing
00 Fast
Offset 0E - Header Type (00h).......................................... RO
01 Medium .....................................default (fixed)
10 Slow
11 Reserved
.......................... always reads 0
8
Data Parity Detected
............... always reads 1
7
Fast Back to Back Capable
........................................ always reads 0
6-0 Reserved
Revision 1.71 June 9, 2000
-81-
Function 4 Regs - Power Management, SMBus and HWM
ETC [ ETC ]
