VT82C686B
Offset 53-50 - GP Timer Control (0000 0000h) ..............RW
3
GP0 Timer Start
On setting this bit to 1, the GP0 timer loads the value
defined by bits 15-8 of this register and starts
counting down. The GP0 timer is reloaded at the
occurrence of certain peripheral events enabled in the
GP Timer Reload Enable Register (Power
Management I/O Space Offset 38h). If no such event
occurs and the GP0 timer counts down to zero, then
the GP0 Timer Timeout Status bit is set to one (bit-2
of the Global Status register at Power Management
Register I/O Space Offset 28h). Additionally, if the
GP0 Timer Timeout Enable bit is set (bit-2 of the
Global Enable register at Power Management
Register I/O Space Offset 2Ah), then an SMI is
generated.
31-30 Conserve Mode Timer Count Value
00 1/16 second ............................................default
01 1/8 second
10 1 second
11 1 minute
29 Conserve Mode Status
This bit reads 1 when in Conserve Mode
28 Conserve Mode Enable
0
Disable ...................................................default
1
Enable
27-26 Secondary Event Timer Count Value
00 2 milliseconds.........................................default
01 64 milliseconds
2
GP0 Timer Automatic Reload
10 ½ second
11 by EOI + 0.25 milliseconds
0
1
GP0 Timer stops at 0 ............................ default
Reload GP0 timer automatically after counting
down to 0
25 Secondary Event Occurred Status
This bit reads 1 to indicate that a secondary event has
occurred (to resume the system from suspend) and the
secondary event timer is counting down.
24 Secondary Event Timer Enable
1-0 GP0 Timer Base
00 Disable................................................... default
01 1/16 second
10 1 second
11 1 minute
0
Disable ...................................................default
1
Enable
(base defined by bits 5-4)
23-16 GP1 Timer Count Value
Write to load count value; Read to get current count
(base defined by bits 1-0)
15-8 GP0 Timer Count Value
Write to load count value; Read to get current count
7
GP1 Timer Start
On setting this bit to 1, the GP1 timer loads the value
defined by bits 23-16 of this register and starts
counting down. The GP1 timer is reloaded at the
occurrence of certain peripheral events enabled in the
GP Timer Reload Enable Register (Power
Management I/O Space Offset 38h). If no such event
occurs and the GP1 timer counts down to zero, then
the GP1 Timer Timeout Status bit is set to one (bit-3
of the Global Status register at Power Management
Register I/O Space Offset 28h). Additionally, if the
GP1 Timer Timeout Enable bit is set (bit-3 of the
Global Enable register at Power Management
Register I/O Space Offset 2Ah), then an SMI is
generated.
6
GP1 Timer Automatic Reload
0
1
GP1 Timer stops at 0 .............................default
Reload GP1 timer automatically after counting
down to 0
5-4 GP1 Timer Base
00 Disable ...................................................default
01 1/16 second
10 1 second
11 1 minute
Revision 1.71 June 9, 2000
-85-
Function 4 Regs - Power Management, SMBus and HWM
ETC [ ETC ]
