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VT82C686B 参数 Datasheet PDF下载

VT82C686B图片预览
型号: VT82C686B
PDF下载: 下载PDF文件 查看货源
内容描述: PCI SUPER -I / O集成外设控制器 [PCI Super-I/O Integrated Peripheral Controller]
分类和应用: 控制器PC
文件页数/大小: 128 页 / 1074 K
品牌: ETC [ ETC ]
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VT82C686B  
Offset 48 - Miscellaneous Control 3.................................RW  
4C - ISA DMA/Master Memory Access Control 1 ........ RW  
........................................ always reads 0  
7-4 Reserved  
7-0 PCI Memory Hole Bottom Address  
These bits correspond to HA[23:16] ............default=0  
3
2
1
0
Extra RTC Port 74/75 Enable  
0
Disable ...................................................default  
4D - ISA DMA/Master Memory Access Control 2 ........ RW  
1
Enable  
(HA[23:16])  
7-0 PCI Memory Hole Top Address  
Integrated USB Controller Disable  
These bits correspond to HA[23:16] ............default=0  
0
Enable.....................................................default  
1
Disable  
Note: Access to the memory defined in the PCI memory  
hole will not be forwarded to PCI. This function is  
disabled if the top address is less than or equal to the  
bottom address.  
Integrated IDE Controller Disable  
0
Enable.....................................................default  
1
Disable  
512K PCI Memory Decode  
4F-4E - ISA DMA/Master Memory Access Control 3... RW  
0
1
Use Rx4E[15-12] to select top of PCI memory  
Use contents of Rx4E[15-12] plus 512K as top  
of PCI memory.......................................default  
for ISA DMA/Master accesses  
15-12 Top of PCI Memory  
0000 1M .................................................... default  
0001 2M  
... ...  
1111 16M  
Offset 4A - IDE Interrupt Routing ..................................RW  
7
Wait for PGNT Before Grant to ISA Master /  
DMA  
Note: All ISA DMA / Masters that access addresses higher  
than the top of PCI memory will not be directed to the  
PCI bus.  
0
Disable ...................................................default  
1
Enable  
6
Bus Select for Access to I/O Devices Below 100h  
........def=0  
.......def=0  
........def=1  
........def=1  
......def=0  
......def=0  
.......def=0  
.......def=0  
.....def=0  
11 Forward E0000-EFFFF Accesses to PCI  
10 Forward A0000-BFFFF Accesses to PCI  
0
1
Access ports 00-FFh via XD bus............default  
Access ports 00-FFh via SD bus (applies to  
external devices only; internal devices such as  
the mouse controller are not effected)  
9
8
7
6
5
4
3
2
1
0
Forward 80000-9FFFF Accesses to PCI  
Forward 00000-7FFFF Accesses to PCI  
Forward DC000-DFFFF Accesses to PCI  
Forward D8000-DBFFF Accesses to PCI  
Forward D4000-D7FFF Accesses to PCI  
Forward D0000-D3FFF Accesses to PCI  
Forward CC000-CFFFF Accesses to PCI  
Forward C8000-CBFFF Accesses to PCI  
Forward C4000-C7FFF Accesses to PCI  
Forward C0000-C3FFF Accesses to PCI  
..................... default = 0  
5-4 Reserved (do not program)  
3-2 IDE Second Channel IRQ Routing  
00 IRQ14  
01 IRQ15.....................................................default  
10 IRQ10  
11 IRQ11  
......def=0  
.......def=0  
.......def=0  
1-0 IDE Primary Channel IRQ Routing  
00 IRQ14.....................................................default  
01 IRQ15  
10 IRQ10  
11 IRQ11  
Revision 1.71 June 9, 2000  
-58-  
Function 0 Registers - PCI to ISA Bridge  
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