VT82C686B
PCI Configuration Space Header – Function 6 Modem
Offset 13-10 - Base Address 0 – SGD Control / Status .. RW
Offset 1-0 - Vendor ID .......................................................RO
........................................always reads 0
.........................................default = 00h
7-0 00000001b (256 bytes)
31-16 Reserved
15-8 Base Address
................. (1106h = VIA Technologies)
0-7 Vendor ID
Offset 3-2 - Device ID.........................................................RO
(3068h = 82C686B Modem Codec)
Offset 5-4 - Command.......................................................RW
........................................ always reads 0
0-7 Device ID
Offset 1F-1C - Base Address 3 – Codec Register ShadowRW
........................................always reads 0
15-2 Base Address.....................................default = 0000h
31-16 Reserved
15-10 Reserved
.......................................fixed at 0
Fast Back-to-Back
1-0 01b (4 bytes)
9
8
7
6
5
4
3
2
1
0
.............................................fixed at 0
SERR# Enable
Offset 3C - Interrupt Line................................................ RW
........................................fixed at 0
Address Stepping
........................................always reads 0
7-4 Reserved
3-0 Audio Interrupt Routing
................................fixed at 0
Parity Error Response
.....................................fixed at 0
VGA Palette Snoop
0000 Disable................................................... default
...................fixed at 0
Memory Write and Invalidate
0001 IRQ1
0010 Reserved
0011 IRQ3
0100 IRQ4
0101 IRQ5
0110 IRQ6
0111 IRQ7
1000 IRQ8
1001 IRQ9
1010 IRQ10
1011 IRQ11
1100 IRQ12
1101 IRQ13
1110 IRQ14
1111 Disable
...........................fixed at 0
Special Cycle Monitoring
.................................................fixed at 0
Bus Master
.............................................fixed at 0
Memory Space
............................... default=0 (disabled)
I/O Space
Offset 7-6 - Status...........................................................RWC
........................ always reads 0
...............................fixed at 0
...............................fixed at 0
...............................fixed at 0
...............................fixed at 0
15 Detected Parity Error
14 Signalled System Error
13 Received Master Abort
12 Received Target Abort
11 Signalled Target Abort
10-9 DEVSEL# Timing
00 Fast
01 Medium.................................................... fixed
10 Slow
11 Reserved
Data Parity Error
(03h)
Offset 3D - Interrupt Pin
......................................... RO
........................................fixed at 0
8
........................fixed at 0
........................................ always reads 0
7
Fast Back-to-Back Capable
(00h)
Offset 3E - Minimum Grant
Offset 3F - Minimum Latency
.................................... RO
(00h)
6-0 Reserved
................................. RO
(nnh)
Offset 8 - Revision ID
...............................................RO
7-0 Silicon Revision Code (0 indicates first silicon)
(00h)
Offset 9 - Programming Interface
.........................*RO
(80h)
Offset A - Sub Class Code
......................................*RO
(07h)
Offset B - Base Class Code
.....................................*RO
*Registers 9-B are RW if function 5-6 Rx44[5] = 1
(00h)
Offset D - Latency Timer
(00h)
.........................................RO
Offset E - Header Type
............................................RO
(00h)
Offset F - BIST
..........................................................RO
Revision 1.71 June 9, 2000
-107- Function 5 & 6 Registers - AC97 Audio & Modem Codecs
ETC [ ETC ]
