VT82C686B
I/O Base 0 Registers –Audio/Modem Scatter/Gather DMA
Read / Write through function 5, R/O through function 6.
I/O Offset 0 – Audio SGD Read Channel Status .........RWC
I/O Offset 10 – Audio SGD Write Channel Status.......... RO
7
6
SGD Active (0 = completed or terminated)........RO
SGD Paused..........................................................RO
7
6
SGD Active (0 = completed or terminated) ....... RO
SGD Paused ......................................................... RO
........................................ always reads 0
5-4 Reserved
........................................always reads 0
5-4 Reserved
3
2
1
0
SGD Trigger Queued (will restart after EOL) ..RO
SGD Stopped (write 1 to resume) ...................RWC
SGD EOL ......................................................RWC
SGD Flag ......................................................RWC
3
2
1
0
SGD Trigger Queued (will restart after EOL).. RO
SGD Stopped (write 1 to resume)................... RWC
SGD EOL ..................................................... RWC
SGD Flag ..................................................... RWC
I/O Offset 1 – Audio SGD Read Channel Control..........RW
I/O Offset 11 – Audio SGD Write Channel Control...... RW
7
6
SGD Start ............................WO (always reads 0)
7
6
SGD Start ............................WO (always reads 0)
0
No effect
0
No effect
1
Start SGD read channel operation
1
Start SGD write channel operation
SGD Terminate ......................WO (always reads 0)
SGD Terminate.......................WO (always reads 0)
0
No effect
0
No effect
1
Terminate SGD read channel operation
1
Terminate SGD write channel operation
.....always reads 0, writing 1 not allowed
5-4 Reserved
SGD Pause
.... always reads 0, writing 1 not allowed
5-4 Reserved
SGD Pause
3
3
0
Release SGD read channel pause and resume
0
Release SGD write channel pause and resume
the transfer from the paused line
the transfer from the paused line
1
Pause SGD read channel operation (SGD read
channel pointer stays at the current address)
1
Pause SGD write channel operation (SGD
write channel pointer stays at current address)
........................................ always reads 0
2-0 Reserved
........................................always reads 0
2-0 Reserved
I/O Offset 2 – Audio SGD Read Channel Type ..............RW
I/O Offset 12 – Audio SGD Write Channel Type........... RW
(1=Enable) ....... default = 0
(1=Enable) ...................... default = 0
7
6
5
Auto-Start SGD at EOL
Playback FIFO
PCM 16-Bit Format
(1=Enable)........default = 0
(1=Enable).....................default = 0
7
6
5
Auto-Start SGD at EOL
Recording FIFO
PCM 16-Bit Format
0
8-Bit Format...........................................default
0
8-Bit Format .......................................... default
1
16-Bit Format
1
16-Bit Format
4
PCM Stereo Format
4
PCM Stereo Format
0
Mono Format..........................................default
0
1
Mono Format......................................... default
Stereo Format
........................................always reads 0
1
Stereo Format
3-2 Interrupt Select
00 Interrupt at PCI Read of Last Line .........default
3-2 Reserved
1
0
(1=Ena) ...def=0
(1=Ena)....def=0
Interrupt on EOL @ End of Block
Interrupt on FLAG @ End-of-Blk
01 Interrupt at Last Sample Sent
10 Interrupt at Less Than One Line to Send
11 -reserved-
I/O Offset 17-14 – Audio SGD W Ch Table Pointer BaseRW
(1=Ena)... def=0
(1=Ena) ... def=0
1
0
Interrupt on EOL @ End of Block
Interrupt on FLAG @ End-of-Blk
31-0 SGD Table Pointer Base Address (even addr).... W
Current Pointer Address ....................................... R
I/O Offset 7-4 – Audio SGD R Ch Table Pointer Base...RW
I/O Offset 1F-1C – Audio SGD W Ch Current Count ... RO
31-0 SGD Table Pointer Base Address (even addr).....W
Current Pointer Address........................................R
........................................always reads 0
31-24 Reserved
23-0 Current SGD Write Channel Count
End Of Link. 1 indicates this block is the last of the
link. If the channel “Interrupt on EOL” bit is set, then
an interrupt is generated at the end of the transfer.
Block Flag. If set, transfer pauses at the end of this
block. If the channel “Interrupt on FLAG” bit is set,
then an interrupt is generated at the end of this block.
Block Stop. If set, transfer pauses at the end of this
block. To resume the transfer, write 1 to Rx?0[2].
EOL
I/O Offset F-C – Audio SGD R Ch Current Count.........RO
........................................ always reads 0
31-24 Reserved
23-0 Current SGD Read Channel Count
FLAG
STOP
SGD Table Format
63
62
61
60-56
55-32
31-0
Base
EOL FLAG STOP -reserved- Base
Count
[23:0]
Address
[31:0]
Revision 1.71 June 9, 2000
-110- Function 5 & 6 Registers - AC97 Audio & Modem Codecs
ETC [ ETC ]
