VT82C686B
General Purpose I/O Registers
I/O Offset 44 – External SMI / GPI Input Value.............RO
I/O Offset 4B-48 - GPI Port Input Value (GPIVAL)...... RO
Depending on the configuration, up to 8 external SCI/SMI
ports are available as indicated below. The state of these
inputs may be read in this register.
......................................... always read 0
31-24 Reserved
.................... Read Only
23-16 GPI[23-16] by Refresh Scan
......................................... always read 0
15-12 Reserved
............................. Read Only
11-0 GPI[11-0] Input Value
7
6
5
4
3
2
1
0
RING# Input Value................................. (GPI7 pin)
SMBALRT# Input Value ....................... (GPI6 pin)
PME# Input Value.................................. (GPI5 pin)
SLPBTN# Input Value............................ (GPI4 pin)
General Purpose Input 17 Value ......... (GPI17 pin)
General Purpose Input 16 Value ......... (GPI16 pin)
General Purpose Input 1 Value ............. (GPI1 pin)
EXTSMI# Input Value
I/O Offset 4F-4C - GPO Port Output Value (GPOVAL)RW
Reads from this register return the last value written (held on
chip)
........................................always reads 0
31-26 Reserved
................def = 3FFFFFFh
25-0 GPO[25-0] Output Value
I/O Offset 45 – SMI / IRQ / Resume Status .....................RO
........................................ always reads 0
7-5 Reserved
4
Latest PCSn Status
0
Latest PCSn was an I/O Read
1
Latest PCSn was an I/O Write
3
2
1
0
FM SMI or Serial SMI Status
Hardware Monitor IRQ Status
SMBus IRQ Status
SMBus Resume Status
Revision 1.71 June 9, 2000
-98-
Power Management I/O-Space Registers
ETC [ ETC ]
