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VS1005 参数 Datasheet PDF下载

VS1005图片预览
型号: VS1005
PDF下载: 下载PDF文件 查看货源
内容描述: 此产品是芬兰VLSI刚刚研发成功的音频编解码芯片样品 [此产品是芬兰VLSI刚刚研发成功的音频编解码芯片样品]
分类和应用:
文件页数/大小: 104 页 / 1715 K
品牌: ETC [ ETC ]
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VS1005g Datasheet  
7
VS1005 GENERAL DESCRIPTION  
Ethernet Controller  
Ethernet Controller is an interface to 10base-t network. The interface uses digital signal levels  
and external components are required to connect to ethernet. The core clock must be switched  
to 60 MHz when ethernet peripheral is used.  
The ethernet interface pins can also be used as general-purpose I/O.  
USB  
The USB peripheral handles USB 2.0 Full Speed and High Speed harware protocols. Low  
speed communication is not supported, but is correctly ignored. The USBP pin has a software-  
controllable 1.5kpull-up.  
A control endpoint (1 IN and 1 OUT) and upto 6 other endpoints (3 IN and 3 OUT) can be  
used simultaneously. Bulk, interrupt, and isochronous transfer modes are selectable for each  
endpoint. USB receive from USB host to device (OUT) uses a 2 KiB buffer, thus allowing very  
high transfer speeds. USB transmit from device to USB host (IN) also uses a 2 KiB buffer and  
allows all IN endpoints to be ready to transmit simultaneously. Double-buffering is also possible,  
but not usually required.  
The firmware uses the USB peripheral to implement both USB Mass Storage Device and USB  
Audio Device. Which device is activated depends on the state of GPIO0_6 when the USB  
connection is detected. If GPIO0_6 has a pull-up resistor, VS1005 appears as an USB Au-  
dio Device. If GPIO0_6 has a pull-down resistor, VS1005 appears as an USB Mass Storage  
Device.  
7.2 Analog Section  
The third regulator provides power for the analog section.  
The analog section consists of digital to analog converters, an earphone driver and FM receiver.  
This includes a buffered common voltage generator (CBUF, around 1.2 V) that can be used as  
a virtual ground for headphones.  
The regulator AVDD output pin must be connected to AVDD1 and AVDD2 pins with proper  
bypass capacitors, because they are not connected internally. The AVDDRF pin is connected  
to regulator CVDD pin with proper bypass capacitors or with external regulator from VHIGH.  
The USB pins use the internal AVDD voltage, and the firmware configures AVDD to 3.6 V when  
USB is attached.  
AVDD voltage level can be monitored by software. Currently the firmware does not take advan-  
tage of this feature.  
CBUF contains a short-circuit protection. It disconnects the CBUF driver if pin is shorted to  
ground. In practise this only happens with external power regulation, because there is a limit to  
how much power the internal regulators can provide.  
Version: 0.2, 2012-03-16  
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