VS1005g Datasheet
9
FIRMWARE OPERATION
“WLS5” string starting at address 0, and the rest of the boot data starting at address 4. If no
identifier is found, SPI EEPROM boot is skipped.
Boot records are read from EEPROM until an execute record is reached. Unknown records are
skipped using the data length field.
Byte Description
0
type 0=I-mem 1=X-mem 2=Y-mem 3=execute
data len lo, hi – data length in bytes
address lo, hi – record address
data*
1,2
3, 4
5..
9.2 NAND FLASH Probe
If NAND FLASH chip select (NFCE) is high, a NAND FLASH is assumed to be present and the
first sector is read. The access methods (nandTypes 0..5) are tried in order to find the “VLN5”
identification. If the first bytes are “VLN5”, a valid boot sector is assumed. This sector gives the
necessary information about the NAND FLASH so that it can be accessed in the right way.
NandFlash Header
Byte
Value
Description
0,1,2,3
4
0x56 0x4c 0x4E 0x35 ’V’ ’L’ ’N’ ’5’ – Identification
0x03
NandType lo (0x0003 = large-page with 3-byte
block address), See table
5
6
7
0x00
0x08
0x13
0x00 0x46
0x00 0x01
NandType hi
BlockSizeBits (28 ∗ 512 = 128 KiB per block)
FlashSizeBits (219 ∗ 512 = 256 MiB flash)
NandWaitNs – NAND FLASH access time in ns
Number of extra blocks for boot (example:
0x0001)
8,9
10,11
12,13,14,15 0x42 0x6f 0x4f 0x74
16...511
’B’ ’o’ ’O’ ’t’ – Optional boot ident
code
NandFlash Type Configuration
Low byte Description
(byte 0x4)
0
1
2
512+16 B small-page flash with 2-byte block address (<= 32 MB)
2048+64 B large-page flash with 2-byte block address (<= 128 MB)
512+16 B small-page flash with 3-byte block address (> 32 MB <=
8 GB)
3
2048+64 B large-page flash with 3-byte block address (> 128 MB <=
32 GB)
4
5
512+16 B small-page flash with 4-byte block address (> 8 GB)
2048+64 B large-page flash with 4-byte block address (> 32 GB)
If bytes 12-15 contain “BoOt”, the value in bytes 10 and 11 determines how many sectors are
read from NAND-flash. Value 1 means two 512-byte sectors are read, value 0 means only
Version: 0.2, 2012-03-16
27
ETC [ ETC ]
