VS1005g Datasheet
9
FIRMWARE OPERATION
the first block is needed. After the data is read into memory, the boot records in this data are
processed, transferring code and data sections into the right places in memory and possibly
executed. If an unknown boot record is encountered, the booting is stopped and control returns
to the firmware code.
NandFlash Record Configuration
Code byte Description
17, 16
19, 18
21, 20
22..
type 0x8000=I-mem 0x8001=X-mem 0x8002=Y-mem 0x8003=execute
data length in (words -1) : 0 = 1 word, 1 = 2 words, etc.
address – record address
data
9.3 UART Boot/Monitor
When byte 0xef is sent to RX at 115200 bps, the firmware enters monitor mode and communi-
cates with vs3emu. Memory contents can be displayed, executables can be loaded and run,
or the firmware code can be restarted or continued.
The UART is also a convenient way to program the NAND FLASH boot sector(s) or the SPI
EEPROM.
Version: 0.2, 2012-03-16
28
ETC [ ETC ]
