Ver 1.3
PRELIMINARY
EAGLE
3.18
YC Image Capturer
3.18.1 Description
YC Image Capturer built inside EAGLE receives an external image (Video Decoder : YCbCr 4:2:2 format ) as input,
converts the image into YCbCr 4:2:0 format, separates Y(luminance) and C(Chrominance), and stores them (Y and C) into
user defined frame memory area.
The internal scaler in EAGLE reads data from memory. Read data goes through Scale Up / Down, RGB Conversion, CSC
Image Capturer and stored in Frame Buffer ( Image Capture Buffer ) before being displayed.
This design allows bus occupation rate and access time to be set-up appropriately to maximize the efficiency of Local Bus
(upper-layer AMBA in EAGLE) for various applications in Multi-Master System.
3.18.2 Features
- Selectable Bus Request FIFO Level. ( 16 or 32 Level Request )
- One FIFO( 64x32 ) for each Y and C signals
- One memory interface for each Y and C signals
* Notice !!!
The input frequency of Dot-Clock should be less than one half of the active frequency of YC Image Capturer Module
3.18.3 Block Diagram
Frame Arbiter
Hand Shake Signal
Frame Memory
Hand Shake Signal
Y FIFO
Control
Signal
YC Image Capturer
[63:0]X [31:0]
Dual Port
Y FIFO
Data
Frame
Memory
Address
Y FIFO
Main Control
FSM
Engine
Dedicated
DMAC
&
FIFO Write
Data
Control
Signals
AHB
Interface
C FIFO
Control
Signal
FIFO
Control
Signals
Controller
YCbCr
4:2: 2 to4:2:0
Conversion
[63:0]X[31:0]
Dual Port
C FIFO
Data
C FIFO
Display Related Signals
Source Resolution
H / V Sync.,
Data Enabl,e
Destination Resolution
Scale Buffer
Frame Memory
Related Signals
Request, Address, Data
Dot Cloc,k
YCbCr4:2: 2 Data
Figure 3-32 YC Image Capture Engine Block Diagram
* Y : Luminance Data, C : Chrominance Data
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CONFIDENTIAL
Beijing Peak Microtech Co.Ltd.