ADM7008
Register Description
Bit #
Name Description
Type Default
Interface
Note: that bit 8:5
should be
combined with
REC100,
RECFUL pin
input to
determine the
finalized speed
and duplex
mode.
4:0
Selector These 5 bits are hardwired to 00001b,
Field indicating that the PHY841F supports
IEEE 802.3 CSMA/CD.
RO
01h Used by Auto
Negotiation
Block.
4.3.6 Auto Negotiation Link Partner Ability (Register 5h)
Bit #
Name Description
Type Default
Interface
15
NPAGE Next Page
RO
0h Updated by Auto
Negotiation
1: Capable of next page function
0: Not capable of next page function
Block
14
13
ACK Acknowledge
RO
0h Updated by Auto
Negotiation
1: Link Partner acknowledges reception
of the ability data word
Block
0: Not acknowledged
RF
RO
0h Updated by Auto
Negotiation
Remote Fault
1: Remote Fault has been detected
0: No remote fault has been detected
Block
12 Reserved
RO
RO
0h
11
LP_DIR Link Partner Asymmetric Pause
0h Updated by Auto
Negotiation
Block
Direction.
10
LP_PAU
LP_T4
RO
RO
0h Updated by Auto
Negotiation
Block
Link Partner Pause Capability
Value on PAUREC will be stored in this
bit during power on reset.
9
8
0h Updated by Auto
Link Partner Technology Ability for
Negotiation
100Base-T4
Block
Defaults to 0.
LP_FDX
LP_HDX
RO
RO
1h Used by Auto
Negotiation
Block
100Base-TX Full Duplex
1: Capable of 100M Full duplex
operation
0: Not capable of 100M Full duplex
operation
7
1h Used By Auto
Negotiation
100Base-TX Half Duplex
1: Capable of 100M operation
ADMtek Inc.
4-10
ETC [ ETC ]
