ADM7008
Register Description
Interface
Bit #
Name Description
Type Default
Duplex mode
FX : Set to 0 all the time to indicate that
the PHY841F does not support 10M Full
Duplex mode
11 CAP_TH
RO
1h
10M Half Duplex Capable
TP : Set to 1 all the time to indicate that
the PHY841F does support 10M Half
Duplex mode
FX : Set to 0 all the time to indicate that
the PHY841F does not support 10M Half
Duplex mode
10
CAP_T2
RO
0h
0h
100Base-T2 Capable
Set to 0 all the time to indicate that the
PHY841F does not support 100Base-T2
9:7 Reserved
RO
RO
6
CAP_SUPRMF Preamble Suppression Capable
This bit is hardwired to 1 indicating that
the PHY841F accepts management frame
without preamble. Minimum 32
1h Use to Control
MDC/MDIO
State Machine.
preamble bits are required following
power-on or hardware reset. One idle bit
is required between any two management
transactions as per IEEE 802.3u
specification.
5
AN_COMP
REM_FLT
RO
RO
RO
0h Status Updated
by Auto
Auto Negotiation Complete
1: Auto Negotiation process completed
0: Auto Negotiation process not
completed
Negotiation
Control Block.
If auto negotiation is enabled, this bit
indicates whether the auto negotiation
process has been completed or not.
Set to 0 all the time when Fiber Mode is
selected.
4
3
0h Status Updated
by Auto
Remote Fault Detect
1: Remote Fault detected
Negotiation
0: Remote Fault not detected
Control Block
This bit is latched to 1 if the RF bit in the
auto negotiation link partner ability
register (bit 13, register address 05h) is
set or the receive channel meets the far
end fault indication function criteria. It is
unlatched when this register is read.
CAP_ANE
G
1h
1: Capable of auto negotiation
ADMtek Inc.
4-7
ETC [ ETC ]
