ADM7008
Register Description
Interface
Bit #
15:5 Reserved
14 XOVEN
Name Description
Type Default
RO
1h
R/W
pin PI_XOVEN
Cross Over Auto Detect Enable.
0: Disable
1: Enable
3:1 Reserved
DISPMG
RO
R/W
0h
0
0h REC_DISPMG
Disable Power Management Feature.
0: Enable. Enable Medium Detect
Function.
1: Disable. Medium_On is high all the
time.
4.3.10 PHY 10M Module Configuration Register (Register 11h)
Bit # Name Description
Type Default
Interface
15:6 Reserved
RO
0h
0h Will be On
5
DRV62MA
R/W
Reduce 10M Driver to 62mA.
1: 62mA
when DISPMG
is set to low
during power
on reset.
0: Normal
4
3
APDIS
R/W
R/W
0h REC_APOLDIS
TP Module
Auto Polarity Disable
1: Auto Polarity Function Disabled
0: Normal
Polarity pin.
ENRJAB
1h REC_ENRJAB
Enable Receive Jabber Monitor.
Control two
0: Disable
blocks :
1: Enable
1.Receive Jabber
(CRS keeps
high all the
time)
2.CRS Low less
than 2 3 us
0h REC_DISTJAB
2
1
0
DISTJAB
NTH
R/W
R/W
R/W
Disable Transmit Jabber
1: Disable Transmit Jabber Function
0: Enable Transmit Jabber Function
0h REC_NTH
Normal Threshold
0: Lower 10BASE-T Receive threshold
1: Normal 10BASE-T Receive threshold
FGDLNK
0h REC_FGDLINK
Force 10M Receive Good Link
1: Force Good Link
0: Normal Operation
ADMtek Inc.
4-12
ETC [ ETC ]
