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TMXF281553BAL-3C-DB 参数 Datasheet PDF下载

TMXF281553BAL-3C-DB图片预览
型号: TMXF281553BAL-3C-DB
PDF下载: 下载PDF文件 查看货源
内容描述: 电信/数据通信\n [Telecomm/Datacomm ]
分类和应用: 电信数据通信
文件页数/大小: 784 页 / 10078 K
品牌: ETC [ ETC ]
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TMXF28155 Supermapper  
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1  
Data Sheet  
June 2002  
14 Digital Jitter Attenuation Controller Registers  
Table of Contents  
Contents  
Page  
14 Digital Jitter Attenuation Controller Registers ..................................................................................................336  
14.1 Digital Jitter Attenuation Controller Register Descriptions........................................................................337  
14.2 Digital Jitter Attenuation Controller Register Map ....................................................................................340  
Tables  
Page  
Table 480. DJA_VERSION, DJA Version and Identification (RO) .........................................................................337  
Table 481. DJA_EVENT1—DJA_EVENT2, Loss of Clock and Overflow/Underflow Delta (COR/COW) ..............337  
Table 482. DJA_MASK1—DJA_MASK2, Loss of Clock and Overflow/Underflow Masks (R/W)...........................337  
Table 483. DJA_STATE1—DJA_STATE2, Loss of Clock and VT Pointer Adjustment Indicators (R/W) ...............338  
Table 484. DJA_E1GAINH—DJA_E1GAINL, E1 Accumulator Gain Threshold (R/W) .........................................338  
Table 485. DJA_DS1GAINH—DJA_DS1GAINL, DS1 Accumulator Gain Threshold (R/W)..................................338  
Table 486. DJA_E1SCALE, E1 Scale Factor (R/W)..............................................................................................338  
Table 487. DJA_DS1SCALE, DS1 Scale Factor (R/W).........................................................................................338  
Table 488. DJA_E1PTRH—DJA_E1PTRL, E1 First-Order Loop Counter (R/W) .................................................339  
Table 489. DJA_DS1PTRH—DJA_DS1PTRL, DS1 First-Order Loop Counter (R/W) ..........................................339  
Table 490. DJA_DS1SELH—DJA_DS1SELL, DS1 E1 Mode Select (R/W) .........................................................339  
Table 491. DJA_CLK_CTL1—DJA_CLK_CTL4, Reference Clock Rate and Edge Transitions (R/W) .................339  
Table 492. DJA Register Map................................................................................................................................340  
336  
Agere Systems Inc.  
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