TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
12 28-Channel Framer Registers (continued)
Table 455. FRM_HCR11, Receive HDLC Channel Register 11 (RO)
Address*
Bit
Name
Function
Reset
Default
0x8HP03
15:4
3
RSVD
Reserved. Reads 0.
0x000
FRM_RIDLE
Receive Channel Idle. A 1 indicates this channel has been
detected as idle.
0
0
0
0
2
1
0
FRM_OVR
FRM_EOP
Receive FIFO Overflow. A 1 indicates this channel’s FIFO
has overflowed.
End of Packet. A 1 indicates an end of packet has been
detected on this channel.
FRM_HRTHRSH Receive FIFO Threshold Interrupt. A 1 indicates this
channel’s FIFO has exceeded the programmed threshold
value.
* See Table 444 on page 309 for mapping of H and P.
Table 456. FRM_HCR12, Receive HDLC Channel Register 12 (R/W)
Address*
Bit
Name
Function
Reset
Default
0x8HP04
15:4
3
RSVD
Reserved. Must write to 0.
0x000
1
FRM_MIDLE
Receive Channel Idle Interrupt Mask. A 1 masks this
channel’s idle detection interrupt.
2
1
0
FRM_MOVR
FRM_MEOP
Receive FIFO Overflow Interrupt Mask. A 1 masks this
channel’s FIFO overflow interrupt.
1
1
1
End of Packet Interrupt Mask. A 1 masks this channel’s
end of packet interrupt.
FRM_MHRTHRSH Receive FIFO Threshold Interrupt Mask. A 1 masks this
channel’s exceeded FIFO threshold interrupt.
* See Table 444 on page 309 for mapping of H and P.
314
Agere Systems Inc.
ETC [ ETC ]
