TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
12 28-Channel Framer Registers (continued)
12.18 Line Encoder/Decoder Per Link Registers
Table 442. FRM_LDLR1, Line Decoder Link Register 1 (R/W)
Address*
Bit
Name
Function
Reset
Default
Reserved. Must write to 0.
Line Format Violation Option.
0x8LTFC
15:6
5
RSVD
0x000
0
FRM_EXCZERO
0 = excessive zeros are not included in bipolar violations.
1 = excessive zeros are included in bipolar violations.
4
FRM_RLCLK_EDGE Receive Line Clock Edge Select.
0
0 = data and bipolar violations are latched in on the posi-
tive edge of the receive line interface clock (rlclk).
1 = data and bipolar violations are latched in on the neg-
ative edge of the receive line interface clock
(RLCLK0).
3
RSVD
Reserved. Must write to 0.
0
2:0
FRM_LD_MODE[2:0] Line Decoder Mode.
000
000 = single-rail (CMI use single-rail).
001 = HDB3.
010 = B8ZS.
011 = AMI.
100 = reserved.
101 = reserved.
110 = reserved.
111 = reserved.
* See Table 439 on page 307 for values of L and T.
Table 443. FRM_LDLR2, Line Encoder Link Register 2 (R/W)
Address*
Bit
Name
Function
Reset
Default
0x8LRFD
15:5
4
RSVD
Reserved. Must write to 0.
0x000
0
FRM_TLCLK_EDGE Transmit Line Clock Edge Select.
0 = data and frame sync are latched out on the positive
edge of the transmit line interface clock (TL_CLK).
1 = data and frame sync are latched out on the negative
edge of the transmit line interface clock (TL_CLK).
3
RSVD
Reserved. Must write to 0.
0
2:0
FRM_LE_MODE[2:0] Line Encoder Mode.
000
000 = single-rail (CMI use single-rail).
001 = HDB3.
010 = B8ZS.
011 = AMI.
100 = reserved.
101 = reserved.
110 = reserved.
111 = reserved.
* See Table 441 on page 307 for values of L and R.
308
Agere Systems Inc.
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