Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers (continued)
12.14 System Interface Per Link Registers
Table 430. FRM_SYSLR1, System Interface Link Register 1 (R/W)
Address*
Bit
Name
Function
Reset
Default
0x8LPE0
15
RSVD
Reserved. Must write to 0.
0
14:8 FRM_BYOFF[6:0] CHI Byte Offset. This bit is only applicable in the CHI mode. 0000000
7
RSVD
Reserved. Must write to 0.
0
000
0
6:4
3:2
1
FRM_OFF[2:0] CHI Bit Offset.
RSVD
Reserved. Must write to 0.
FRM_HALFOFF Half Bit Offset. When set to 1, an offset of 1/2 bit is added to
0
offsets.
0
FRM_QUAROFF Quarter Bit Offset. When set to 1, an offset of 1/4 bit is
0
added to the offsets. CHI CMS mode only.
* See Table 429 on page 298 for values of L and P.
Table 431. FRM_SYSLR2, System Interface Link Register 2 (R/W)
This register applies to the receive path only, inserted in the transmit system interface on demand.
Address*
Bit
Name
Function
Reset
Default
0x8LPE1
15
FRM_CEPTMAIS Transmit CEPT TS16 AIS.
0 = no action.
0
1 = time slot 16 is forced to all ones.
FRM_CEPTAAIS Transmit CEPT TS16 AIS on Loss of MFA.
0 = no action.
14
0
1 = time slot 16 is forced to all ones when time slot 16
multiframe alignment is lost.
13
12
FRM_MANAIS
Transmit System AIS.
0 = no action.
0
0
1 = transmit system AIS to the system.
FRM_CEPTSTMP Transmit System CEPT TS16 Stomp.
0 = no action.
1 = if upper or lower nibble of time slot 16 is 0000, then it is
changed to 1111 toward the transmit system interface.
11:0
RSVD
Reserved. Must write to 0.
0x000
* See Table 429 on page 298 for values of L and P.
Table 432. FRM_SYSLR3—FRM_SYSLR6, System Interface Link Registers 3—6 (R/W)
Address*
Bit
Name
Function
Reset
Default
0x8LPE2
0x8LPE3
0x8LPE4
0x8LPE5
15:0
15:0
15:0
15:0
RSVD
RSVD
RSVD
RSVD
Reserved. Must write to 0.
0x0000
0x0000
0x0000
0x0000
Reserved. Must write to 0.
Reserved. Must write to 0.
Reserved. Must write to 0.
* See Table 429 on page 298 for values of L and P.
Agere Systems Inc.
299
ETC [ ETC ]
