Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers (continued)
Table 434. FRM_ARLR2, Arbiter Link Register 2 (R/W)
Address*
Bit
Name
Function
Reset
Default
0x8LPF1
15
FRM_ESF_CRC_EN CRC Framing Enable.
0
DS1 Modes: ESF CRC framing algorithm enable:
0 = ESF CRC framing disabled.
1 = ESF CRC framing enabled. (Enables inclusion of CRC
in the frame search algorithm.)
CEPT Modes: CRC-4 multiframe:
0 = multiframe reframe disabled.
1 = multiframe reframe enabled. (Enables the inclusion of
the following criteria to the CEPT loss of multiframe
criteria. Three consecutive multiframe alignment
pattern bit errors will cause a search for a new
multiframe alignment. Basic frame alignment is not
lost.)
14
FRM_FAST
Fast Frame Mode.
0
DS1 Modes:
0 = disable quick frame recovery.
1 = enable quick frame recovery as follows:
D4 and J-D4: 36 fewer frame bits are checked.
SLC-96: Eighteen fewer FT bits are checked during the
search for FT framing.
DDS: No change.
CEPT Modes:
0 = disable quick frame recovery.
1 = this bit enables the (n + 2) framing research algorithm
as defined in the note in Recommendation G.706,
Section 4.1.2. When an FAS is found in frame n,
frame (n + 1) is checked to ensure that it is a non-FAS
frame and frame (n + 2) is checked for FAS. Failure to
meet either of these conditions results in a new
search in frame (n + 2).
* See Table 429 on page 298 for values of L and P.
Agere Systems Inc.
301
ETC [ ETC ]
