Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers (continued)
Table 398. FRM_PMLR5, Performance Monitor Link Register 5 (COR)
Address*
Bit
Name
Function
Reset
Default
0x8LP84 15:14
13
RSVD
Reserved. Must write to 0.
0
0
FRM_LFV
Line Format Violation. A 1 indicates the receive framer detected
a bipolar line coding or excessive zeros violation. The perfor-
mance monitor counts all pulses on the BPV signal from the frame
aligner block. This signal is set when the error occurs and is
cleared when it is read, if there is not another error during the
read. (G.703 Annex A and O.161, Section 2.)
12
FRM_FBE
Frame-Bit Errored. A 1 indicates the receive framer detected a
frame bit or frame alignment pattern error. For SF formats, either
FT, or FT and FS bits are used and are programmable. This signal
is set when the error occurs and is cleared when it is read, if there
is not another error during the read. In DDS, FT and FS are always
counted as FBEs. The PMON is, however, configurable as to
whether TS24 is also counted as an FBE. In CEPT, FAS words
can only generate one FBE.
0
11
10
FRM_CRCE CRC Errored. A 1 indicates the receive framer detected a CRC
error. It is the occurrence of a received CRC code that is not iden-
tical to the locally calculated code. This signal is set when the error
occurs and is cleared when it is read, if there is not another error
during the read. This signal is only valid in ESF (G.704, Section
A.1) and CEPT CRC-4 (G.704, Section A.3) modes.
0
0
FRM_ECRCE Excessive CRC Errors. A 1 indicates the receive framer detected
an excessive CRC error condition. This signal is set when the
error occurs and is cleared when it is read, if there is not another
error during the read. This signal is only valid in ESF and CEPT
CRC-4 modes. The CRC error count is provisionable. In ESF, an
excessive CRC error is defined as ≥320 CRC errors in 1 s. In
CEPT, an excessive CRC error is defined as ≥915 CRC errors in
1 s.
9
FRM_REBIT Received E Bit = 0. A 1 indicates the receive framer detected an
E bit = 0 in the CEPT CRC-4 modes. This signal is set when the
error occurs and is cleared when it is read if there is not another
error during the read. This signal is only valid in CEPT CRC-4
modes.
0
8
7
FRM_CREBIT Continuous Received E Bits. A 1 indicates the detection of a 5 s
interval containing ≥991 E bit = 0 events in each second. The E-bit
error count is provisionable. The defaults of 991 are shown.
0
0
FRM_LTFA
Loss of Transmit Frame Alignment. DS1: Always 1.
CEPT FRM_LTFA: A 1 indicates that the CEPT biframe alignment
pattern (alternating 0, 1 in bit 2 of time slot 0) received from the
system is in error. This alignment pattern is required when trans-
mitting the Si or Sa bits transparently. Detection of this condition
may optionally be disabled.
6
FRM_NFA
New Frame Alignment. A 1 indicates the receive framer has
0
reframed.
* See Table 393 on page 279 for values of L and P.
Agere Systems Inc.
287