2. Interrupt enable register 1 (IENR1)
Bit
7
IENTA
0
6
5
4
IEN4
0
3
IEN3
0
2
IEN2
0
1
IEN1
0
0
IEN0
0
IENS1 IENWP
Initial value
Read/Write
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IENR1 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7: Timer A interrupt enable (IENTA)
Bit 7 enables or disables timer A overflow interrupt requests.
Bit 7
IENTA
Description
0
1
Disables timer A interrupt requests
Enables timer A interrupt requests
(initial value)
(initial value)
(initial value)
Bit 6: SCI1 interrupt enable (IENS1)
Bit 6 enables or disables SCI1 transfer complete interrupt requests.
Bit 6
IENS1
Description
0
1
Disables SCI1 interrupt requests
Enables SCI1 interrupt requests
Bit 5: Wakeup interrupt enable (IENWP)
Bit 5 enables or disables WKP7 to WKP0 interrupt requests.
Bit 5
IENWP
Description
0
1
Disables WKP7 to WKP0 interrupt requests
Enables WKP7 to WKP0 interrupt requests
70
ETC [ ETC ]
