Table 15-3 Control Signal Timing (cont)
VCC = 1.8 V to 5.5 V, AVCC = 1.8 V to 5.5 V, VSS = AVSS = 0.0 V, Ta = –20°C to +75°C
(including subactive mode) unless otherwise indicated.
Applicable Values
Reference
Item
Symbol Pins
Min
70
Typ
—
Max
—
Unit Test Condition
Figure
External clock
high width
tCPH
OSC1
ns
VCC = 4.5 V to 5.5 V
VCC = 3.0 V to 5.5 V
VCC = 2.6 V to 5.5 V
VCC = 2.2 V to 5.5 V
Except the above
Figure 15-1
2
100
140
200
400
—
—
—
*
—
—
—
—
Figure 15-1
—
—
X1
15.26
or
—
µs
13.02
External clock
low width
tCPL
OSC1
70
—
—
—
—
—
—
—
—
—
—
—
ns
VCC = 4.5 V to 5.5 V
VCC = 3.0 V to 5.5 V
VCC = 2.6 V to 5.5 V
VCC = 2.2 V to 5.5 V
Except the above
Figure 15-1
2
100
140
200
400
—
*
Figure 15-1
X1
15.26
or
µs
13.02
External clock
rise time
tCPr
tCPf
tREL
OSC1
—
—
—
—
—
—
—
—
10
—
—
—
—
—
—
—
—
—
20
ns
VCC = 4.5 V to 5.5 V
VCC = 2.6 V to 5.5 V
Except the above
Figure 15-1
2
30
*
55
Figure 15-1
Figure 15-1
Figure 15-1
X1
55.0
20
ns
ns
External clock
fall time
OSC1
VCC = 4.5 V to 5.5 V
VCC = 2.6 V to 5.5 V
Except the above
2
30
*
55
Figure 15-1
Figure 15-1
Figure 15-2
X1
55.0
—
ns
Pin RES low
RES
tcyc
width
385
ETC [ ETC ]
