Table 15-5 Serial Interface (SCI3-1, SCI3-2) Timing
VCC = 1.8 V to 5.5 V, AVCC = 1.8 V to 5.5 V, VSS = AVSS = 0.0 V, Ta = –20°C to +75°C
(including subactive mode) unless otherwise indicated.
Values
Symbol Min
Reference
Item
Typ
—
—
—
—
—
—
—
—
—
Max
—
—
0.6
1
Unit
tcyc or
tsubcyc
tScyc
Test Conditions
Figure
Input clock
cycle
Asynchronous tScyc
Synchronous
4
Figure 15-6
6
Input clock pulse width
Transmit data delay time
(synchronous)
tSCKW
tTXD
0.4
Figure 15-6
Figure 15-7
—
tcyc or VCC = 4.0 V to 5.5 V
tsubcyc Except the above
—
1
Receive data setup time
(synchronous)
tRXS
200.0
400.0
200.0
400.0
—
—
—
—
ns
VCC = 4.0 V to 5.5 V
Except the above
VCC = 4.0 V to 5.5 V
Except the above
Figure 15-7*
Figure 15-7
Figure 15-7*
Figure 15-7
Receive data hold time
(synchronous)
tRXH
ns
Notes: * When internal power supply step-down circuit is not used
388
ETC [ ETC ]
