Table 15-4 Serial Interface (SCI1) Timing
VCC = 1.8 V to 5.5 V, AVCC = 1.8 V to 5.5 V, VSS = AVSS = 0.0 V, Ta = –20°C to +75°C unless
otherwise indicated
Applicable Values
Reference
Figure
Item
Symbol Pins
Min
2
Typ
—
Max
—
Unit Test Condition
Input clock cycle tScyc
SCK1
SCK1
tcyc
Figure 15-5
Figure 15-5
Input clock high tSCKH
width
0.4
—
—
tScyc
Input clock low
width
tSCKL
SCK1
SCK1
0.4
—
—
tScyc
Figure 15-5
Input clock rise
time
tSCKr
—
—
—
—
—
—
—
—
—
—
—
60.0
80.0
60.0
80.0
ns
ns
ns
ns
VCC = 4.0 to 5.5 V
Except the above
VCC = 4.0 to 5.5 V
Except the above
VCC = 4.0 to 5.5 V
Except the above
VCC = 4.0 to 5.5 V
Except the above
VCC = 4.0 to 5.5 V
Except the above
Figure 15-5*
Figure 15-5
Figure 15-5*
Figure 15-5
Figure 15-5*
Figure 15-5
Figure 15-5*
Figure 15-5
Figure 15-5*
Figure 15-5
—
Input clock fall
time
tSCKf
SCK1
SO1
SI1
—
—
Serial output
data delay time
tSOD
—
200.0 ns
350.0 ns
—
Serial input data tSIS
setup time
200.0
400.0
200.0
400.0
—
—
—
—
ns
ns
ns
ns
Serial input data tSIH
hold time
SI1
Note:
*
When internal power supply step-down circuit is not used.
387
ETC [ ETC ]
