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RTL8100CL 参数 Datasheet PDF下载

RTL8100CL图片预览
型号: RTL8100CL
PDF下载: 下载PDF文件 查看货源
内容描述: 电源管理单芯片快速以太网控制器 [SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT]
分类和应用: 外围集成电路控制器LTE局域网以太网以太网:16GBASE-T
文件页数/大小: 73 页 / 652 K
品牌: ETC [ ETC ]
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RTL8100C & RTL8100CL  
Datasheet  
5.6. Attachment Unit Interface  
Table 6. Attachment Unit Interface  
Symbol  
TXD+  
TXD-  
RXIN+  
RXIN-  
X1  
Type  
O
O
Pin No  
Description  
100/10Base-T Transmit (TX) data.  
1
2
I
I
5
6
100/10Base-T Receive (RX) data.  
I
O
121  
122  
25MHz Crystal/OSC Input.  
Crystal Feedback Output.  
X2  
This output is used in a crystal connection only. It must be left open when  
X1 is driven with an external 25MHz oscillator.  
5.7. Test and Other Pins  
Table 7. Test and Other Pins  
Symbol  
RTT3  
RTSET  
Type  
TEST  
I/O  
Pin No  
123  
127  
Description  
Chip Test pin.  
This pin must be pulled low by a resistor.  
Refer to section 9 Application Information, page 61, for the correct  
value.  
CTRL25  
Analog  
I/O  
8
Use this pin and an external PNP type transistor to generate +2.5V for  
the RTL8100C(L).  
Clock Run.  
CLKRUN  
65  
This signal is used to request starting (or speeding up) of the clock.  
CLKRUN also indicates the clock status. CLKRUN is an open drain  
output as well as an input. The RTL8100C(L) requests the central  
resource to start, speed up, or maintain the interface clock by the  
assertion of CLKRUN. For the host system, it is an S/T/S signal. The  
host system (central resource) is responsible for maintaining  
CLKRUN asserted, and for driving it high to the negated (deasserted)  
state.  
NC  
-
9~11,13~16, 18, 19, 22, Not Connected.  
24, 45, 48, 62, 72~74,  
110, 112, 116, 118,  
120, 125, 126  
Single-Chip Fast Ethernet Controller  
9
Track ID: JATR-1076-21 Rev. 1.06