RTL8100C & RTL8100CL
Datasheet
5. Pin Description
5.1. Power Management/Isolation Interface
The following signal type codes are used in the tables:
I: Input.
O: Output.
T/S: Tri-State bi-directional input/output pin.
S/T/S: Sustained Tri-State.
O/D: Open Drain.
Table 1. Power Management/Isolation Interface
Symbol
PMEB
Type
O/D
Pin No
31
Description
Power Management Event.
(PME#)
Open drain, active low. Used by the RTL8100C(L) to request a
change in its current power management state and/or to indicate that
a power management event has occurred.
ISOLATEB
I
23
Isolate Pin: Active low.
(ISOLATE#)
Isolates the RTL8100C(L) from the PCI bus. The RTL8100C(L) does
not drive its PCI outputs (excluding PME#) and does not sample its
PCI input (including RST# and PCICLK) as long as the Isolate pin is
asserted.
LWAKE
O
105
LAN WAKE-UP Signal.
Signals to the motherboard that it should execute the wake-up
process. The motherboard must support Wake-On-LAN (WOL).
There are 4 output choices, active high, active low, positive pulse,
and negative pulse, that may be asserted from the LWAKE pin. See
the LWACT bit in Table 19. CONFIG 1: Configuration Register 1,
page 23, for the setting of this output signal. The default output is an
active high signal.
When a PME event is received, LWAKE and PMEB assert at the
same time if LWPME (bit4, CONFIG4) is set to 0. If LWPME is set
to 1, LWAKE asserts only when PMEB asserts and ISOLATEB is
low.
This pin is a 3.3V signaling output pin.
Single-Chip Fast Ethernet Controller
5
Track ID: JATR-1076-21 Rev. 1.06