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X51638S8-1.8 参数 Datasheet PDF下载

X51638S8-1.8图片预览
型号: X51638S8-1.8
PDF下载: 下载PDF文件 查看货源
内容描述: SPI串行EEPROM与监控功能\n [SPI Serial EEPROM with Supervisory Features ]
分类和应用: 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 21 页 / 102 K
品牌: ETC [ ETC ]
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X51638  
CPU Supervisor with 16Kb SPI EEPROM  
FEATURES  
DESCRIPTION  
• Extended Power-On Reset (800ms Nominal)  
• Selectable Watchdog Timer  
This device combines four popular functions, Power-on  
Reset Control, Watchdog Timer, Supply Voltage Supervi-  
sion, and Block Lock™ Protect Serial EEPROM in one  
package. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
• Low Vcc Detection and Reset Assertion  
—Five Standard Reset Threshold Voltages  
—Re-program Low Vcc Reset Threshold Voltage  
using special programming sequence  
—Reset Signal Valid to Vcc=1V  
Applying power to the device activates a power on reset  
circuit which holds RESET active for a period of time.  
This allows the power supply and oscillator to stabilize  
before the processor can execute code. This device  
allows 800ms before releasing the controller.  
• Determine Watchdog or Low Voltage Reset with  
a Volatile Flag bit  
• Long Battery Life With Low Power Consumption  
—<50mA Max Standby Current, Watchdog On  
—<1mA Max Standby Current, Watchdog Off  
—<400mA Max Active Current during Read  
• 16Kbits of EEPROM  
• Built-in Inadvertent Write Protection  
Power-Up/Power-Down Protection Circuitry  
—Protect 0, 1/4, 1/2 or all of EEPROM Array with  
Block LockTM Protection  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. When the microcontrol-  
ler fails to restart a timer within a selectable time-out  
interval, the device activates the RESET signal. The user  
selects the interval from three preset values. Once  
selected, the interval does not change, even after cycling  
the power.  
—In Circuit Programmable ROM Mode  
• 2MHz SPI Interface Modes (0,0 & 1,1)  
• Minimize EEPROM Programming Time  
—32 Byte Page Write Mode  
—Self-Timed Write Cycle  
—5ms Write Cycle Time (Typical)  
The X51638 low Vcc detection circuitry protects the  
user’s system from low voltage conditions, resetting the  
system when Vcc falls below the minimum Vcc trip point.  
RESET is asserted until Vcc returns to proper operating  
level and stabilizes. Five industry standard V  
thresh-  
TRIP  
olds are available, however, Xicor’s unique circuits allow  
the thresold to be reprogrammed to meet custom  
requirements or to fine-tune the threshold for applications  
requiring higher precision.  
• 1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power  
Supply Operation  
• Available Packages  
—14-Lead TSSOP, 8-Lead SOIC  
BLOCK DIAGRAM  
WATCHDOG TRANSITION  
DETECTOR  
WATCHDOG  
TIMER RESET  
WP  
PROTECT LOGIC  
RESET  
SI  
DATA  
STATUS  
REGISTER  
SO  
REGISTER  
COMMAND  
DECODE &  
CONTROL  
LOGIC  
RESET &  
WATCHDOG  
TIMEBASE  
SCK  
4K BITS  
4K BITS  
CS/WDI  
VCC THRESHOLD  
RESET LOGIC  
8K BITS  
POWER ON AND  
LOW VOLTAGE  
RESET  
V
+
-
CC  
GENERATION  
V
TRIP  
ÓXicor, Inc. 1999 Patents Pending  
9900-3002.10 2/12/99 T0/C0/D0  
Characteristics subject to change without notice  
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