NT5DS32M4AT
NT5DS16M8AT
128Mb Double Data Rate SDRAM
Truth Table 4: Current State Bank n - Command to Bank m (Different bank)
(Part 2 of 2)
Current State
CS
L
RAS
L
CAS
H
WE
H
Command
Active
Action
Select and activate row
Notes
1-6
L
H
L
H
Read
Select column and start new Read burst
Select column and start Write burst
1-7,10
Read (With
Auto Precharge)
L
L
L
L
L
L
H
L
L
L
L
H
H
L
L
Write
Precharge
Active
1-7,9,10
1-6
H
H
L
L
Select and activate row
1-6
H
H
L
Read
Select column and start Read burst
Select column and start new Write burst
1-7,10
1-7,10
1-6
Write (With
Auto Precharge)
L
Write
H
Precharge
1. This table applies when CKE n-1 was high and CKE n is high (see Truth Table 2: Clock Enable (CKE) and after t
met (if the previous state was self refresh).
t
has been
XSNR / XSRD
2. This table describes alternate bank operation, except where noted, i.e., the current state is for bank n and the commands shown are
those allowed to be issued to bank m (assuming that bank m is in such a state that the given command is allowable). Exceptions are cov-
ered in the notes below.
3. Current state definitions:
Idle:
Row Active:
The bank has been precharged, and t
A row in the bank has been activated, and t
in progress.
has been met.
RP
has been met. No data bursts/accesses and no register accesses are
RCD
Read:
Write:
A Read burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Read with Auto Precharge Enabled: See note 10.
Write with Auto Precharge Enabled: See note 10.
4. Auto Refresh and Mode Register Set commands may only be issued when all banks are idle.
5. A Burst Terminate command cannot be issued to another bank; it applies to the bank represented by the current state only.
6. All states and sequences not shown are illegal or reserved.
7. Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes with
Auto Precharge disabled.
8. Requires appropriate DM masking.
9. A Write command may be applied after the completion of data output.
10. The Read with Auto Precharge enabled or Write with Auto Precharge enabled states can each be broken into two parts: the access
period and the precharge period. For Read with Auto Precharge, the precharge period is defined as if the same burst was executed with
Auto Precharge disabled and then followed with the earliest possible Precharge command that still accesses all of the data in the burst.
For Write with Auto Precharge, the precharge period begins when t
ends, with t
measured as if Auto Precharge was disabled. The
WR
WR
access period starts with registration of the command and ends where the precharge period (or t ) begins. During the precharge period
R P
of the Read with Auto Precharge Enabled or Write with Auto Precharge Enabled states, Active, Precharge, Read, and Write commands
to the other bank may be applied; during the access period, only Active and Precharge commands to the other bank may be applied. In
either case, all other related limitations apply (e.g. contention between Read data and Write data must be avoided).
48
REV 1.0
May, 2001
©
NANYA TECHNOLOGY CORP. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
ETC [ ETC ]
