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ZADCS147 参数 Datasheet PDF下载

ZADCS147图片预览
型号: ZADCS147
PDF下载: 下载PDF文件 查看货源
内容描述: 12位, 200ksps的8通道,串行输出ADC [12-Bit, 200ksps, 8-Channel, Serial Output ADC]
分类和应用:
文件页数/大小: 19 页 / 556 K
品牌: ZMD [ Zentrum Mikroelektronik Dresden AG ]
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Datasheet  
ZADCS146 / ZADCS147  
Figure 4: Block diagram of input multiplexer  
Figure 5: Input voltage range in unipolar mode  
VIN+  
Shown configuration  
A2 … A0 = 0x000  
1.5*VREF  
0xFFF  
CH0  
CH1  
CH2  
CH3  
CH4  
VREF  
Code Range  
CH5  
0.5*VREF  
IN+  
Converter  
CH6  
CH7  
0x000  
IN-  
0V  
VDD-VREF VIN-  
Figure 6: Input voltage range for fully differen-  
tial signals in bipolar mode  
VCM  
VREF  
¾ VREF  
VCM Range  
COM  
¼ VREF  
0V  
SGL/DIF = HIGH  
See Table 3 & Table 4  
for Coding Schemes  
-VREF/2  
0V  
+VREF/2  
VDIFF  
voltage at INto obtain codes unequal to 0x000. The  
entire 12 bit transfer characteristic is then covered by IN+  
if IN+ ranges from INto (IN+Vref). Any voltage on  
IN+ > (IN+ Vref) results in code 0xFFF. Code 0xFFF is  
not reached, if (IN+Vref) > VDD + 0.2V because the  
input voltage is clamped at VDD + 0.2V by ESD protec-  
tion devices.  
the peak to peak amplitude of the differential input signal  
can be ± Vref/2.  
The average input current on the analog inputs depends  
on the conversion rate. The signal source must be capa-  
ble of charging the internal sampling capacitors (typically  
16pF on each input of the converter: IN+ and IN) within  
the acquisition time tACQ to the required accuracy. The  
equivalent input circuit in sampling mode is shown in  
Figure 7.  
The voltage at INcan range from -0.2V … ½ VREF with-  
out limiting the Code Range, assuming the fore men-  
tioned VDD condition is true. See also Figure 5 for input  
voltage ranges in unipolar conversion mode.  
The following equation provides a rough hand calculation  
for a source impedance RS that is required to settle out a  
DC input signal referenced to AGND with 12 bit accuracy  
in a given acquisition time  
In bipolar mode, IN+ can range from (IN- Vref/2) to (IN–  
+ Vref/2) keeping the converter out of code saturation.  
For instance, if INis set to a constant DC voltage of  
Vref/2, then IN+ can vary from 0V to Vref to cover the  
entire code range. Lower or higher voltages of IN+ keep  
the output code at the minimum or maximum code value.  
CHOLD+  
RSW  
CH0  
CH1  
CH2  
CH3  
CH4  
CH5  
CH6  
CH7  
Figure 6 shows the input voltage ranges in bipolar mode  
when INis set to a constant DC voltage.  
IN+  
CIN  
4pF  
16pF  
3kΩ  
As explained before, ZADCS146 / ZADCS147 can also  
be used to convert fully differential input signals that  
change around a common mode input voltage.  
AGND  
CHOLD-  
VDC  
RSW  
The bipolar mode is best used for such purposes since it  
allows the input signals to be positive or negative in rela-  
tion to each other.  
COM  
Channel  
Multiplexer  
IN-  
CIN  
4pF  
AGND  
16pF  
3kΩ  
The common mode level of a differential input signal is  
calculated VCM = (V(IN+)+ V(IN)) / 2. To avoid code clip-  
ping or over steering of the converter, the common mode  
level can change from ¼ Vref … ¾ Vref. Within this range  
Figure 7: Equivalent input circuit during sampling  
Copyright © 2008, ZMD AG, Rev. 1.1  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The  
Information furnished in this publication is preliminary and subject to changes without notice.  
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