Z8FMC16100 Series Flash MCU
Product Specification
285
Table 162. Logical Instructions
Mnemonic
AND
Operands
dst, src
dst, src
dst
Instruction
Logical AND
ANDX
COM
Logical AND using extended addressing
Complement
OR
dst, src
dst, src
dst, src
dst, src
Logical OR
ORX
Logical OR using extended addressing
Logical Exclusive OR
XOR
XORX
Logical Exclusive OR using extended addressing
Table 163. Program Control Instructions
Mnemonic
ATM
Operands
Instruction
—
—
Atomic
BRK
On-Chip Debugger Break
BTJ
p, bit, src, DA Bit Test and Jump
BTJNZ
BTJZ
CALL
DJNZ
IRET
JP
bit, src, DA
Bit Test and Jump if Non-Zero
bit, src, DA
Bit Test and Jump if Zero
Call Procedure
dst
dst, src, RA
Decrement and Jump Non-Zero
Interrupt Return
Jump
—
dst
dst
DA
DA
—
JP cc
JR
Jump Conditional
Jump Relative
JR cc
RET
Jump Relative Conditional
Return
TRAP
vector
Software Trap
Table 164. Rotate and Shift Instructions
Mnemonic
BSWAP
RL
Operands
dst
Instruction
Bit Swap
dst
Rotate Left
PS024604-1005
P R E L I M I N A R Y
eZ8 CPU Instruction Set
ZILOG [ ZILOG, INC. ]
