Z8 Encore!® Motor Control Flash MCUs
Product Specification
282
eZ8 CPU Instruction Classes
eZ8 CPU instructions can be divided functionally into the following groups:
Arithmetic
Bit Manipulation
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Block Transfer
CPU Control
Load
Logical
Program Control
Rotate and Shift
Tables 157 through 164 contain the instructions belonging to each group and the number
of operands required for each instruction. Some instructions appear in more than one table
as these instruction can be considered as a subset of more than one category. Within these
tables, the source operand is identified as src, the destination operand is dst and a condi-
tion code is cc.
Table 157. Arithmetic Instructions
Mnemonic
ADC
Operands
dst, src
dst, src
dst, src
dst, src
dst, src
dst, src
dst, src
dst, src
dst
Instruction
Add with Carry
ADCX
ADD
Add with Carry using extended addressing
Add
ADDX
CP
Add using extended addressing
Compare
CPC
Compare with Carry
Compare with Carry using extended addressing
Compare using extended addressing
Decimal Adjust
CPCX
CPX
DA
DEC
dst
Decrement
DECW
INC
dst
Decrement Word
dst
Increment
INCW
dst
Increment Word
PS024604-1005
P R E L I M I N A R Y
eZ8 CPU Instruction Set
ZILOG [ ZILOG, INC. ]
