Z8FMC16100 Series Flash MCU
Product Specification
105
Timer 0 PWM High and Low Byte Registers
The Timer 0 PWM High and Low Byte (T0PWMH and T0PWML) registers, shown in
Tables 62 and 63, define Pulse-Width Modulator (PWM) operations. These registers also
store the timer counter values for the Capture modes.
The two bytes {PWMH[7:0], PWML[7:0]} form a 16-bit value that is compared to the
current 16-bit timer count. When a match occurs, the PWM output changes state. The
PWM output value is set by the TPOL bit in the Timer Control 1 Register (T0CTL1).
The T0PWMH and T0PWML registers also store the 16-bit captured timer value when
operating in CAPTURE or CAPTURE/COMPARE modes.
Table 62. Timer 0 PWM High Byte Register (T0PWMH)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PWMH
00H
R/W
F04H
ADDR
Table 63. Timer 0 PWM Low Byte Register (T0PWML)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PWML
00H
R/W
F05H
ADDR
PWMH and PWML—Pulse-Width Modulator High and Low Bytes
These two bytes, {PWMH[7:0], PWML[7:0]}, form a 16-bit value that is compared to the
current 16-bit timer count. When a match occurs, the PWM output changes state. The
PWM output value is set by the TPOLbit in the Timer Control 1 register (T0CTL1).
The T0PWMH and T0PWML registers also store the 16-bit captured timer value when
operating in CAPTURE or CAPTURE/COMPARE modes.
PS024604-1005
P R E L I M I N A R Y
Timer 0 PWM High and Low Byte Registers
ZILOG [ ZILOG, INC. ]
