Z8FMC16100 Series Flash MCU
Product Specification
107
Bit
Value
(H)
Description
Position
[4]
Timer Input Select
TINSEL
0
1
Timer input is the Timer input pin.
Timer input is the comparator output.
[3–1]
PWM Delay Value
PWMD
This field is a programmable delay to control the number of additional system
clock cycles following a PWM or Reload compare before the Timer Output or the
Timer Output Complement is switched to the active state. This field ensures a
time gap between the deassertion of one PWM output to the assertion of its
complement.
No delay
000
001
010
011
100
101
110
111
2 cycles delay
4 cycles delay
8 cycles delay
16 cycles delay
32 cycles delay
64 cycles delay
128 cycles delay
[0]
Input Capture Event
INCAP
0
1
Previous timer interrupt is not a result of a Timer Input Capture Event
Previous timer interrupt is a result of a Timer Input Capture Event.
Timer 0 Control 1 Register
The Timer 0 Control 1 (T0CTL1) Register, shown in Table 65, enables/disables the timer,
sets the prescaler value, and determines the timer operating mode.
Table 65. Timer 0 Control 1 Register (T0CTL1)
BITS
FIELD
RESET
R/W
7
TEN
6
5
4
3
2
1
0
TPOL
PRES
TMODE
0
0
000
000
R/W
R/W
R/W
R/W
F07H
ADDR
PS024604-1005
P R E L I M I N A R Y
Timer 0 Control Registers
ZILOG [ ZILOG, INC. ]
