Z8 Encore!® Motor Control Flash MCUs
Product Specification
86
Bit
Value
(H)
Description
Position
[1]
Fault 0 Interrupt
Fault0INT
0
1
Interrupt on Fault0 pin assertion disabled.
Interrupt on Fault0 pin assertion enabled.
[0]
Fault 0 Restart
Fault0RST
0
1
Automatic recovery. PWM resumes control of outputs when all fault sources have
deasstered.
Software controlled recovery. PWM resumes control of outputs only after all fault
sources have deasserted and all fault flags are cleared and a PWM reload occurs
Note: This register can only be written when PWENis cleared.
PWM Input Sample Register
PWM pin values are sampled by reading the PWM Input Sample Register, shown in Table
55.
Table 55. PWM Input Sample Register (PWMIN)
BITS
FIELD
RESET
R/W
7
6
5
IN2L
4
3
IN1L
2
1
IN0L
0
Reserved
FAULT
IN2H
IN1H
IN0H
0
0
0
0
0
0
0
0
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
F26H
ADDR
Bit
Value
(H)
Description
Position
[7]
Must be 0.
Reserved
[6]
Sample Fault0 pin
FAULT
0
1
A Low level signal was read on the FAULT pin.
A High level signal was read on the FAULT pin.
[5:0]
Sample PWM pins
IN2L/IN2H/
IN1L/IN1H/
IN0L/IN0H
0
1
A Low level signal was read on the pins.
A High level signal was read on the pins.
Pulse-Width Modulator
P R E L I M I N A R Y
PS024604-1005
ZILOG [ ZILOG, INC. ]
