Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
23
Table 6. Register File Address Map (Continued)
Address (Hex) Register Description
Mnemonic
IRQPS
IRQCTL
Reset (Hex)
00
00
Page #
55
56
FCE
FCF
Interrupt Port Select
Interrupt Control
GPIO Port A
FD0
FD1
FD2
FD3
Port A Address
Port A Control
Port A Input Data
Port A Output Data
PAADDR
PACTL
PAIN
00
00
XX
00
37
38
42
43
PAOUT
GPIO Port B
FD4
FD5
FD6
FD7
Port B Address
Port B Control
Port B Input Data
Port B Output Data
PBADDR
PBCTL
PBIN
00
00
XX
00
37
38
42
43
PBOUT
GPIO Port C
FD8
FD9
FDA
FDB
Port C Address
Port C Control
Port C Input Data
Port C Output Data
PCADDR
PCCTL
PCIN
00
00
XX
00
37
38
42
43
PCOUT
GPIO Port D
FDC
FDD
FDE
FDF
Port D Address
Port D Control
Port D Input Data
Port D Output Data
PDADDR
PDCTL
PDIN
00
00
XX
00
37
38
42
43
PDOUT
GPIO Port E
FE0
FE1
FE2
FE3
Port E Address
Port E Control
Port E Input Data
Port E Output Data
PEADDR
PECTL
PEIN
00
00
XX
00
37
38
42
43
PEOUT
GPIO Port F
FE4
FE5
FE6
FE7
Port F Address
Port F Control
Port F Input Data
Port F Output Data
PFADDR
PFCTL
PFIN
00
00
XX
00
37
38
42
43
PFOUT
GPIO Port G
FE8
FE9
FEA
FEB
Port G Address
Port G Control
Port G Input Data
Port G Output Data
PGADDR
PGCTL
PGIN
00
00
XX
00
37
38
42
43
PGOUT
GPIO Port H
FEC
Port H Address
PHADDR
00
37
XX=Undefined
PS017610-0404
Register File Address Map
ZILOG [ ZILOG, INC. ]
