Z8 Encore! XP® F08xA Series
Product Specification
18
Table 7. Register File Address Map (Continued)
Address (Hex) Register Description
Mnemonic
RSTSTAT
WDTCTL
WDTU
Reset (Hex)
Page #
82
FF0
Reset Status
XX
XX
FF
FF
FF
XX
Watch-Dog Timer Control
Watch-Dog Timer Reload Upper Byte
Watch-Dog Timer Reload High Byte
Watch-Dog Timer Reload Low Byte
Reserved
82
FF1
83
FF2
WDTH
83
FF3
WDTL
83
FF4–FF5
—
Trim Bit Control
FF6
FF7
Trim Bit Address
Trim Data
TRMADR
TRMDR
00
140
140
XX
Flash Memory Controller
FF8
FF8
FF9
Flash Control
FCTL
00
00
00
00
00
00
134
134
135
136
137
137
Flash Status
FSTAT
FPS
Flash Page Select
Flash Sector Protect
FPROT
FFA
FFB
Flash Programming Frequency High Byte FFREQH
Flash Programming Frequency Low Byte FFREQL
eZ8 CPU
FFC
Flags
—
XX
XX
XX
XX
Refer to the
eZ8 CPU User
Manual
FFD
Register Pointer
Stack Pointer High Byte
Stack Pointer Low Byte
RP
FFE
SPH
SPL
FFF
XX=Undefined
PS024705-0405
P R E L I M I N A R Y
Register Map
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