Z8 Encore! XP® F08xA Series
Product Specification
16
Table 7. Register File Address Map (Continued)
Address (Hex) Register Description
Mnemonic
U0STAT0
U0CTL0
U0CTL1
U0STAT1
U0ADDR
U0BRH
U0BRL
Reset (Hex)
Page #
96
F41
UART0 Status 0
0000011Xb
F42
UART0 Control 0
00
00
00
00
FF
FF
XX
98
F43
UART0 Control 1
99
F44
UART0 Status 1
97
F45
UART0 Address Compare
UART0 Baud Rate High Byte
UART0 Baud Rate Low Byte
Reserved
101
101
101
F46
F47
F48–F6F
—
Analog-to-Digital Converter (ADC)
F70
ADC Control 0
ADCCTL0
ADCCTL1
ADCD_H
ADCD_L
ADCTHH
—
00
117
117
120
120
121
F71
ADC Control 1
80
F72
ADC Data High Byte
ADC Data Low Bits
ADC High Threshold High Byte
Reserved
XX
XX
FF
XX
00
F73
F74
F75
F76
ADC Low Threshold High Byte
Reserved
ADCTLH
—
121
30
F77–F7F
XX
Low Power Control
F80
F81
Power Control 0
PWRCTL0
—
80
Reserved
XX
LED Controller
F82
F83
F84
F85
LED Drive Enable
LEDEN
LEDLVLH
LEDLVLL
—
00
00
00
XX
44
44
45
LED Drive Level High Byte
LED Drive Level Low Byte
Reserved
Oscillator Control
F86
Oscillator Control
Reserved
OSCCTL
—
A0
XX
163
123
F87–F8F
Comparator 0
F90
Comparator 0 Control
Reserved
CMP0
—
14
F91–FBF
XX
Interrupt Controller
FC0
Interrupt Request 0
IRQ0 Enable High Bit
IRQ0
00
00
51
53
FC1
IRQ0ENH
XX=Undefined
PS024705-0405
P R E L I M I N A R Y
Register Map
ZILOG [ ZILOG, INC. ]
